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參數(shù)資料
| 型號(hào)： | ML6695CQ |
| 英文描述： | 100BASE-X Fiber Physical Layer With 5-bit Interface |
| 中文描述： | 個(gè)100Base - X光纖物理層與5位接口 |
| 文件頁(yè)數(shù)： | 7/8頁(yè) |
| 文件大?。?/td> | 216K |
| 代理商： | ML6695CQ |
ML6695
7
FUNCTIONAL DESCRIPTION
TRANSMIT SECTION
The ML6695 transmit section accepts parallel NRZ data
nibbles, creates a serial NRZI data stream using the
internal 125MHz clock multiplier, and provides an open-
collector output IOUT to directly drive an LED. IOUT
must be connected to VCC through a 15W resistor. The
internal clock multiplier accepts an external 25MHz
clock input.
The LED driver at IOUT is a current mode switch which
develops the output light by sinking current through the
network LED into IOUT. RTSET'S value determines the
output current:
RTSET
V
IOUT
=
125
140
.
W
(1)
where IOUT is the desired output current.
RECEIVE SECTION
The ML6695 receive section includes a fiber optic
quantizer and a 125MHz receive clock recovery circuit.
The quantizer is a wide-bandwidth limiting amplifier with
DC offset correction. The quantizer output drives a data
comparator with a controlled slicing threshold. The
comparator provides a large-amplitude receive signal. The
clock recovery circuit extracts 125MHz receive clock
from the large-amplitude signal, and provides the clock
for the parallel data output registers. Received NRZ data
nibbles appear at the RSM outputs synchronously with
RXC falling edges. Received signals exceeding the preset
signal detect amplitude threshold for more than 5s cause
the SDO output to go high. Received signals that fall
below the preset threshold for more than 5s cause SDO
to go low.
OTHER MODES
The ML6695 will enter a power down mode when the
PWRDN pin is tied low. In this state the ML6695 powers
down to a low-current (less than 20mA), inoperative state.
Driving it high enables normal operation of the ML6695.
Loopback mode is entered when the LPBK is tied to
ground. In this mode, the data at TSM0-4 are serialized,
then sent to the quantizer, followed by the receive PLL for
clock recovery, and finally to the RSM0-4 outputs. Tying
LPBK to VCC places the ML6695 in its normal mode of
operation.
IOUT
38
39
ML6695
15
15
Figure 1. Test Load
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相關(guān)代理商/技術(shù)參數(shù) |
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| ML6696 | 制造商:MICRO-LINEAR 制造商全稱(chēng):MICRO-LINEAR 功能描述:100BASE-X Fiber Physical Layer |
| ML6696CH | 制造商:MICRO-LINEAR 制造商全稱(chēng):MICRO-LINEAR 功能描述:100BASE-X Fiber Physical Layer |
| ML6696CQ | 制造商:Micro Linear 功能描述:DATACOM, INTERFACE CIRCUIT, PQCC52 |
| ML6697 | 制造商:MICRO-LINEAR 制造商全稱(chēng):MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with MII |
| ML6697CH | 制造商:MICRO-LINEAR 制造商全稱(chēng):MICRO-LINEAR 功能描述:100BASE-TX Physical Layer with MII |
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