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參數(shù)資料
| 型號： | EPM7256AEFC256-10 |
| 廠商： | Altera |
| 文件頁數(shù)： | 8/64頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MAX 7000 CPLD 256 256-FBGA |
| 標準包裝： | 90 |
| 系列： | MAX® 7000A |
| 可編程類型： | 系統(tǒng)內(nèi)可編程 |
| 最大延遲時間 tpd(1)： | 10.0ns |
| 電壓電源 - 內(nèi)部： | 3 V ~ 3.6 V |
| 邏輯元件/邏輯塊數(shù)目： | 16 |
| 宏單元數(shù)： | 256 |
| 門數(shù)： | 5000 |
| 輸入/輸出數(shù)： | 164 |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 256-BGA |
| 供應(yīng)商設(shè)備封裝： | 256-FBGA（17x17） |
| 包裝： | 托盤 |
| 其它名稱： | 544-2345 |
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Altera Corporation
MAX 7000A Programmable Logic Device Data Sheet
In-System
Programma-
bility
MAX 7000A devices can be programmed in-system via an industry-
standard 4-pin IEEE Std. 1149.1 (JTAG) interface. ISP offers quick, efficient
iterations during design development and debugging cycles. The
MAX 7000A architecture internally generates the high programming
voltages required to program EEPROM cells, allowing in-system
programming with only a single 3.3-V power supply. During in-system
programming, the I/O pins are tri-stated and weakly pulled-up to
eliminate board conflicts. The pull-up value is nominally 50 k.
MAX 7000AE devices have an enhanced ISP algorithm for faster
programming. These devices also offer an ISP_Done bit that provides safe
operation when in-system programming is interrupted. This ISP_Done
bit, which is the last bit programmed, prevents all I/O pins from driving
until the bit is programmed. This feature is only available in EPM7032AE,
EPM7064AE, EPM7128AE, EPM7256AE, and EPM7512AE devices.
ISP simplifies the manufacturing flow by allowing devices to be mounted
on a PCB with standard pick-and-place equipment before they are
programmed. MAX 7000A devices can be programmed by downloading
the information via in-circuit testers, embedded processors, the Altera
MasterBlaster serial/USB communications cable, ByteBlasterMV parallel
port download cable, and BitBlaster serial download cable. Programming
the devices after they are placed on the board eliminates lead damage on
high-pin-count packages (e.g., QFP packages) due to device handling.
MAX 7000A devices can be reprogrammed after a system has already
shipped to the field. For example, product upgrades can be performed in
the field via software or modem.
In-system programming can be accomplished with either an adaptive or
constant algorithm. An adaptive algorithm reads information from the
unit and adapts subsequent programming steps to achieve the fastest
possible programming time for that unit. A constant algorithm uses a pre-
defined (non-adaptive) programming sequence that does not take
advantage of adaptive algorithm programming time improvements.
Some in-circuit testers cannot program using an adaptive algorithm.
Therefore, a constant algorithm must be used. MAX 7000AE devices can
be programmed with either an adaptive or constant (non-adaptive)
algorithm. EPM7128A and EPM7256A device can only be programmed
with an adaptive algorithm; users programming these two devices on
platforms that cannot use an adaptive algorithm should use EPM7128AE
and EPM7256AE devices.
The Jam Standard Test and Programming Language (STAPL), JEDEC
standard JESD 71, can be used to program MAX 7000A devices with in-
circuit testers, PCs, or embedded processors.
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參數(shù)描述 |
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| MCP79410 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:I2C? Real-Time Clock/Calendar with EEPROM, SRAM, Unique ID and Battery Switchover |
| MCP79410_13 | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:Battery-Backed I2Ca?￠ Real-Time Clock/Calendar with EEPROM and Unique ID |
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| MCP79410-I/MS | 功能描述:實時時鐘 I2C GP RTCC 1Kb EE 64B SRAM ID RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| MCP79410-I/P | 制造商:Microchip Technology Inc 功能描述:I2C GP RTCC, 1KB EE, 64B SRAM, ID - Rail/Tube 制造商:Microchip Technology Inc 功能描述:RTCC 12C 1K EE 64B SRAM 8PDIP |
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