參數(shù)資料
型號(hào): MCF5251
廠(chǎng)商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: ColdFire Processor
中文描述: ColdFire處理器
文件頁(yè)數(shù): 4/32頁(yè)
文件大?。?/td> 290K
代理商: MCF5251
Functional Description and Application Information
MCF5251 ColdFire Processor Data Sheet: Technical Data, Rev. 2.1
4
Freescale Semiconductor
2
Functional Description and Application Information
2.1
MCF5251 ColdFire
Core
The ColdFire processor Version 2 (CF2) core consists of two independent, decoupled pipeline structures
to maximize performance while minimizing core size. The instruction fetch pipeline (IFP) is a two-stage
pipeline for prefetching instructions. The prefetched instruction stream is then gated into the two-stage
operand execution pipeline (OEP), which decodes the instruction, fetches the required operands, and then
executes the required function.
2.2
Module Inventory
Table 2
shows an alphabetical listing of the modules in the processor.
Table 2. Digital and Analog Modules
Block
Mnemonic
Block Name
Functional
Grouping
Brief Description
ATA
Advanced Technology
Attachment Controller
Connectivity
Peripheral
The ATA block is an AT attachment host interface. Its main use is to
interface with IDE hard disc drives and ATAPI optical disc drives.
ADC
Battery Level/Keypad
Analog/Digital
Converter
Analog Input
The six-channel ADC is based on the Sigma-Delta concept with 12-bit
resolution. Both the analog comparator and digital sections are integrated
in the MCF5251.
AB
Audio Bus
Audio
Interface
The audio interfaces connect to an internal bus that carries all audio data.
Each receiver places its received data on the audio bus and each
transmitter takes data from the audio bus for transmission.
AIM
Audio Interface
Audio
Interface
The audio interface module provides the necessary input and output
features to receive and transmit digital audio signals over serial audio
interfaces (IIS/EIAJ) and over digital audio interfaces (IEC958).
BROM
Bootloader
Boot ROM
The MCF5251 incorporates a ROM Bootloader, which enables booting
from UART, I2C, SPI, or IDE devices.
FlexCAN
Twin Controller Area
Network 2.0B
Communication Unit
Connectivity
Peripheral
The FlexCan module is a full implementation of the Bosch CAN protocol
specification 2.0B, which supports both standard and extended message
frames.
CSM
Chip Select Module
Connectivity
Peripheral
Three programmable chip-select outputs (CS0/CS4, CS1, and CS2)
provide signals that enable glueless connection to external memory and
peripheral circuits.
DMAC
Direct Memory
Access Controller
Module
Connectivity
Peripheral
There are four fully programmable DMA channels for quick data transfer.
eMAC
enhanced Multiply
Accumulate Module
Core
The integrated eMAC unit provides a common set of DSP operations and
enhances the integer multiply instructions in the ColdFire architecture.
MBUS
Memory Bus Interface Bus Operation The bus interface controller transfers data between the ColdFire core or
DMA and memory, peripherals, or other devices on the external bus.
MMC/SD
Multimedia
Card/Secure Digital
Interface
Flash Memory
Card Interface
The interface is Sony Memory Stick, SecureDigital, and Multi-Media
card compatible.
Note:
The Sony Memory Interface does not support Sony MagicGate.
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