
Appendix B
MOTOROLA
MCF5206 USERS MANUAL Rev 1.0
Appendix B-3
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System calls are often implemented by using the TRAP instruction. For trap exceptions,
parameter passing is performed through data and address registersrarely, if ever, directly
through the stack. In addition, a system call typically does not need to know the stacked SR
or PC information.
Breakpoints are usually implemented with the TRAP instruction or an illegal instruction such
as an $A-line exception. If so, the stacked SR and PC are typically used. Other items in the
stack may also need to be queried, especially if the breakpoint displays a stack trace. If so,
you should examine the format closely for stack misalignments at the time of the breakpoint.
This stack misalignment check would be useful in applications where stack alignment is a
software design goal. These same concerns for the breakpoint implementation are
applicable to trace exceptions as well.
A generalized exception handler can be implemented to catch unexpected exceptions. In
addition to the SR and PC information, it is often necessary to obtain the vector information
in the stack. Otherwise, the issues are similar to those found on breakpoints and tracing.
To port the ColdFire access error exception, it is best to start with an MC68000 bus error
handler. The ColdFire access error recovery sequence has many similarities to the
procedure recommended for the MC68000. However, you should be aware that a read bus
error on the ColdFire will not advance the program counter to the next instruction. In
addition, a write bus error may be taken long after an instruction has been executed and the
stacked program counter may not point to the offending instruction.
The main cause of an address error exception in the M68K architecture is that program flow
is forced to continue at an odd address boundary. In addition, an MC68000 reports an
address error if a data byte access is initiated on an odd address. The ColdFire uses the
address error for implementations that do not have the misalignment module. A misaligned
data access is then initiated. Modification of the address error exception handler to reflect a
ColdFire misalignment exception is optional. The MCF5202 contains hardware support for
data misalignment and therefore this is not an issue for family members.
On a ROM monitor, it is often necessary to provide a means by which a user program is
executed given a certain starting address. This is often implemented by placing an exception
stack frame and then performing an RTE. If this is the case, the header files that define what
a stack frame looks like would require modification to reflect the ColdFire stack frame format.
B.5 SUPERVISOR REGISTERS
The target software would eventually need to communicate the contents of registers to the
host software. Both the host portions and target portions of a debugger must be modified to
reflect the single stack pointer architecture of ColdFire. In addition, the target debugger must
keep a copy of the MOVEC register images in memory so that it can provide the host
software register contents when asked to do so. A UNIX grep utility can find all instances of
the MOVEC instruction and perform the appropriate modifications to accommodate the
unidirectional MOVEC instruction.
The ColdFire architecture does not distinguish between a supervisor stack and a user stack.
There is only a single stack pointer, A7. One way of dealing with this issue is to emulate the
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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