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參數(shù)資料
| 型號： | MC100EP142FAG |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC REGISTER SHFT 9BIT ECL 32LQFP |
| 標(biāo)準(zhǔn)包裝： | 250 |
| 系列： | 100EP |
| 邏輯類型： | 移位寄存器 |
| 輸出類型： | 標(biāo)準(zhǔn) |
| 元件數(shù)： | 1 |
| 每個元件的位元數(shù)： | 9 |
| 功能： | 通用 |
| 電源電壓： | 3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-LQFP |
| 供應(yīng)商設(shè)備封裝： | 32-LQFP（7x7） |
| 包裝： | 托盤 |
| 其它名稱： | MC100EP142FAGOS |
Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 16
1
Publication Order Number:
MC10EP142/D
MC10EP142, MC100EP142
3.3 V / 5 VECL 9Bit Shift
Register
The MC10EP/100EP142 is a 9bit shift register, designed with
byte-parity applications in mind. The MC10/100EP142 is capable of
performing serial/parallel data into serial/parallel out and shifting in
only one direction. The nine inputs D0 D8 accept parallel input data,
while SIN accepts serial input data. The QT0:87 outputs do not need
to be terminated for the shift operation to function. To minimize
power, any Q output not used should be left unterminated.
The SEL (Select) input pin is used to switch between the two modes
of operation SHIFT and LOAD. The shift direction is from Bit 0 to
Bit 8. Input data is accepted by the registers a setup time before the
positive going edge of CLK0 or CLK1; shifting is also accomplished
on the positive clock edge. A HIGH on the Master Reset pin (MR)
asynchronously resets all the registers to zero, overriding CLK0 and
CLK1 inputs.
The 100 Series contains temperature compensation.
Features
Shift Frequency >2.8 GHz (Typical)
9-Bit for ByteParity Applications
Asynchronous Master Reset
Dual Clocks
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 3.0 V to 5.5 V
Open Input Default State
Safety Clamp on Inputs
PbFree Packages are Available
LQFP32
FA SUFFIX
CASE 873A
MARKING
DIAGRAM*
*For additional marking information, refer to
Application Note AND8002/D.
1
32
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
xxx
= 10 or 100
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
MCxxx
EP142
AWLYYWWG
QFN32
MN SUFFIX
CASE 488AM
32
1
MCxxx
EP142
AWLYYWWG
G
1
(Note: Microdot may be in either location)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC100EP142FAR2 | 功能描述:計數(shù)器移位寄存器 3.3V/5V ECL 9-Bit RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100EP142FAR2G | 功能描述:計數(shù)器移位寄存器 3.3V/5V ECL 9-Bit Shift RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100EP142MNG | 功能描述:計數(shù)器移位寄存器 BBG ECL SHIFT RGSTR 9 BIT RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100EP142MNR4G | 功能描述:計數(shù)器移位寄存器 BBG ECL SHIFT RGSTR 9 BIT RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| MC100EP14D | 制造商:ONSEMI 制造商全稱:ON Semiconductor 功能描述:3.3V / 5V 1:5 Differential ECL/PECL/HSTL Clock Driver |
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