參數(shù)資料
型號(hào)： MBM30LV0128-PFTR
廠商： FUJITSU LTD
元件分類： DRAM
英文描述： 128 M (16 M X 8) BIT NAND-type
中文描述： 16M X 8 FLASH 2.7V PROM, PDSO48
封裝： PLASTIC, REVERSE, TSOP-48
文件頁(yè)數(shù)： 12/43頁(yè)
文件大?。?/td> 397K
代理商： MBM30LV0128-PFTR
MBM30LV0064
12
Read ID: 90h
This mode allows the identification of the manufacturer and product. After the 90h command cycle, one address
cycle follows in which 00h is entered. The next two RE pulses will output the manufacturer and device code
respectively.
Status Read: 70h
The Status Register may be used to determine if the device is ready, in the write protect mode, or passed
program/erase operations. After the 70h command is entered, the more recent falling edge of either CE or RE
will output the contents of the status register to I/O0 to 7. The status register is continually updated and does
not require either CE or RE to be toggled. By utilizing the CE pin, multiple devices with R/B pins wired together
may be polled to determine their specific status.
Table 5 Code Table
I/O7
I/O6
I/O5
I/O4
I/O3
I/O2
I/O 1
I/O0
Code
Manufacturer
0
0
0
0
0
1
0
0
04h
Device
1
1
1
0
0
1
1
0
E6h
Table 6 Status Output Table
Status
Description
I/O0
Program/Erase
0 = Pass; 1 = Fail
I/O1
Not Used
I/O2
Not Used
I/O3
Not Used
I/O4
Not Used
I/O5
Not Used
I/O6
Ready/Busy
0 = Busy; 1 = Ready
I/O7
Write Protect
0 = Protected; 1 = Unprotected
E6h
04h
90h
00h
RE
I/O0 to I/O7
Manufacturer Code
Device Code
Figure 7 Read ID Operation
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