參數(shù)資料
型號: MAX9320AEKA+
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 時鐘及定時
英文描述: LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
封裝: EXPOSED PAD, SOT-23, 8 PIN
文件頁數(shù): 4/9頁
文件大?。?/td> 197K
代理商: MAX9320AEKA+
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at TA = +25
°C. Guaranteed by design and characterization over the full operating temper-
ature range.
Note 4: All pins open except VCC and VEE.
Note 5: Guaranteed by design and characterization. Limits are set at ±6 sigma.
Note 6: Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 7: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge transi-
tion.
Note 8: Device jitter added to the input signal.
MAX9320/MAX9320A
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
4
_______________________________________________________________________________________
-40
°C
+25
°C
+85
°C
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
VOH - VOL
≥ 300mV,
Clock pattern,
Figure 1
3.0
Switching
Frequency
fMAX
VOH - VOL
≥ 550mV,
Clock pattern,
Figure 1
2.0
GHz
Output
Rise/Fall Time
(20% to 80%)
tR, tF
Figure 1
50
88
120
50
89
120
50
90
120
ps
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC - VEE = +2.25V to +3.8V, outputs loaded with 50
±1% to VCC - 2V, input frequency = 1.5GHz, input transition time = 125ps
(20% to 80%), VIHD = VEE + 1.2V to VCC, VILD = VEE to VCC - 0.15V, VIHD - VILD = 0.15V to the smaller of 3V or VCC - VEE. Typical
values are at VCC - VEE = +3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless otherwise noted.) (Note 5)
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