參數(shù)資料
型號: MAX5942ACSE+T
廠商: Maxim Integrated Products
文件頁數(shù): 13/24頁
文件大?。?/td> 0K
描述: IC IEEE 802.3AF POE SYSTM 16SOIC
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 2,500
控制器類型: 以太網(wǎng)供電控制器(POE)
接口: IEEE 802.3af
電源電壓: 48V
電流 - 電源: 1mA
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應商設備封裝: 16-SOIC
包裝: 帶卷 (TR)
MAX5942A/MAX5942B
IEEE 802.3af Power-Over-Ethernet
Interface/PWM Controller for Power Devices
20
______________________________________________________________________________________
COMPONENT
SUPPLIERS
WEBSITE
International Rectifier
www.irf.com
Fairchild
www.fairchildsemi.com
Power FETS
Vishay-Siliconix
www.vishay.com/brands/siliconix/main.html
Dale-Vishay
www.vishay.com/brands/dale/main.html
Current-Sense Resistors
IRC
www.irctt.com/pages/index.cfm
ON Semi
www.onsemi.com
General Semiconductor
www.gensemi.com
Diodes
Central Semiconductor
www.centralsemi.com
Sanyo
www.sanyo.com
Taiyo Yuden
www.t-yuden.com
Capacitors
AVX
www.avxcorp.com
Coiltronics
www.cooperet.com
Coilcraft
www.coilcraft.com
Magnetics
Pulse Engineering
www.pulseeng.com
Table 3. Component Suppliers
6) Choose RSENSE according to the following equation:
where:
VILIM is the current-sense comparator trip threshold
voltage (0.465V).
NS/NP is the secondary-side turns ratio (5/14 in this
example).
IOUTMAX is the maximum DC output current (10A in
this example):
7) Choose the inductor value so that the peak ripple
current (LIR) in the inductor is between 10% and
20% of the maximum output current:
where VD is the output Schottky diode forward-volt-
age drop (0.5V) and LIR is the ratio of inductor rip-
ple current to DC output current:
8) The size and ESR of the output filter capacitor deter-
mine the output ripple. Choose a capacitor with a
low ESR to yield the required ripple voltage.
Use the following equations to calculate the peak-to-
peak output ripple:
where:
VRIPPLE is the combined RMS output ripple due to
VRIPPLE,ESR, the ESR ripple, and VRIPPLE,C, the
capacitive ripple. Calculate the ESR ripple and
capacitive ripple as follows:
VRIPPLE,ESR = IRIPPLE x ESR
VRIPPLE,C = IRIPPLE/(2 x π x 275kHz x COUT)
Layout Recommendations
All connections carrying pulsed currents must be very
short, be as wide as possible, and have a ground plane
as a return path. The inductance of these connections
must be kept to a minimum due to the high di/dt of the
currents in high-frequency switching power converters.
Current loops must be analyzed in any layout pro-
posed, and the internal area kept to a minimum to
reduce radiated EMI. Ground planes must be kept as
intact as possible.
VV
V
RIPPLE
RIPPLE ESR
RIPPLE C
=+
,,
22
L
-
()× ()
××
=
5 5
1 0 198
0 4 275
10
401
..
.
kHz
A
H
L
V-
OUT
+
()× ()
××
×
VD
LIR
kHz I
DMIN
OUTMAX
1
2
275
RSENSE
××
=
0 465
6
14
12 10
90 4
.
V
m
R
V
N
SENSE
ILIM
S
P
××
12
.IOUTMAX
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