參數資料
型號: MAX5122BEEE
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: DAC
英文描述: +5V/+3V, 12-Bit, Serial, Force/Sense DACs with 10ppm/∑C Internal Reference
中文描述: SERIAL INPUT LOADING, 20 us SETTLING TIME, 12-BIT DAC, PDSO16
封裝: 0.150 INCH, 0.025 INCH PITCH, QSOP-16
文件頁數: 16/20頁
文件大?。?/td> 285K
代理商: MAX5122BEEE
M
+5V /+3V, 12-Bit, S erial, Forc e/S ense DACs
with 10ppm/°C Internal Referenc e
16
______________________________________________________________________________________
Settling Time
The settling time is the amount of time required from the
start of a transition until the DAC output settles to its
new output value within the converter’s specified accu-
racy.
Digital Feedthrough
Digital feedthrough is noise generated on the DAC’s
output when any digital input transitions. Proper board
layout and grounding will significantly reduce this
noise, but there will always be some feedthrough
caused by the DAC itself.
Unipolar Output
Figure 9 shows the MAX5122/MAX5123 setup for unipo-
lar, Rail-to-Rail
operation with a closed- loop gain of
2V/V. With its internal reference of +2.5V, the MAX5122
provides a convenient unipolar output range of 0 to
+4.99878V, while the MAX5123 offers an output range of
0 to +2.49939V with its on-board +1.25V reference.
Table 5 lists example codes for unipolar output voltages.
Bipolar Output
The MAX5122/MAX5123 can be configured for unity-
gain bipolar operation (FB = OUT) using the circuit
shown in Figure 10. The output voltage V
OUT
is then
given by the following equation:
V
OUT
= V
REF
[{G (NB / 4096)} - 1]
where NB is the numeric value of the DAC’s binary
input code, V
REF
is the voltage of the internal (or exter-
nal) precision reference, and G is the overall gain. The
application circuit in Figure 10 uses a low-cost op amp
(MAX4162) external to the MAX5122/MAX5123.
Together with the MAX5122/MAX5123 this circuit offers
an overall gain of +2V/V. Table 6 lists example codes
for bipolar output voltages.
Reset (RS T V AL) and
Clear (
CLR
) Func tions
The MAX5122/MAX5123 DACs feature a clear pin (
CLR
),
which resets the output to a certain value, depending
upon how RSTVAL is set. RSTVAL = DGND selects an
output of 0, and RSTVAL = V
DD
selects a midscale out-
put when
CLR
is pulled low.
The
CLR
pin has a minimum input resistance of 40k
in
series with a diode to the supply voltage (V
DD
). If the
digital voltage is higher than the supply voltage for the
part, a small input current may flow, but this current will
be limited to (V
CLR
- V
DD
- 0.5V) / 40k
.
Note:
Clearing the DAC will also cause the part to exit
a software shutdown (PD = 0).
Daisy-Chaining Devic es
Any number of MAX5122/MAX5123s may be daisy-
chained by simply connecting the serial data output pin
(DOUT) of one device to the serial data input pin (DIN)
of the following device in the chain (Figure 11).
Another configuration (Figure 12) allows several
MAX5122/MAX5123 DACs to share one common DIN
signal line. In this configuration, the data bus is common
to all devices; data is not shifted through a daisy-chain.
However, more I/O lines are required in this configura-
tion, because each IC needs a dedicated
CS
line.
MAX5122
MAX5123
DAC
NOTE:
GAIN = +2V/V
REF
OUT
DGND
AGND
+5V/+3V
V
DD
FB
50k
50k
Figure 9. Unipolar Output Circuit Using Internal
(+1.25V/+2.5V) or External Reference. With external reference,
pull REFADJ to V
DD
.
MAX5122
MAX5123
MAX4162
DAC
AGND
DGND
REF
V
OUT
FB
+5V/+3V
50k
50k
V+
V-
V
DD
OUT
Figure 10. Unity-Gain Bipolar Output Circuit Using Internal
(+1.25V/+2.5V) or External Reference. With external reference,
pull REFADJ to V
DD
.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
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