參數(shù)資料
型號(hào)： MAX4539CAP
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 5/20頁(yè)
文件大?。?/td> 0K
描述： IC MULTIPLEXER 8X1 20SSOP
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 66
功能： 多路復(fù)用器
電路： 1 x 8:1
導(dǎo)通狀態(tài)電阻： 75 歐姆
電壓電源： 單/雙電源
電壓 - 電源，單路/雙路(±)： 2.7 V ~ 12 V，± 2.7 V ~ 6 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 20-SSOP（0.209"，5.30mm 寬）
供應(yīng)商設(shè)備封裝： 20-SSOP
包裝： 管件
MAX4539/MAX4540
Low-Voltage, Single 8-to-1 and
Dual 4-to-1 Cal-Multiplexers
______________________________________________________________________________________
13
Single-Supply Operation
The MAX4539/MAX4540 operate from a single supply
between +2.7V and +12V when V- is connected to
GND. All of the bipolar precautions must be observed.
However, these parts are optimized for ±5V operation,
and most AC and DC characteristics are degraded sig-
nificantly when departing from ±5V. As the overall sup-
ply voltage (V+ to V-) is lowered, switching speed,
on-resistance, off isolation, and distortion will degrade.
(see the
Typical Operating Characteristics section).
Single-supply operation also limits signal levels and
interferes with ground referenced signals. When V- = 0,
AC signals are limited to -0.3V. Voltages below -0.3V can
be clipped by the internal ESD-protection diodes, and
the parts can be damaged if excessive current flows.
Power Up
During power up, on-chip latches will strobe whatever
addresses are present if EN goes high before LATCH
reaches a logic high. When this condition occurs, one of
the internal dividers connected between the supplies
may inadvertently turn on, causing higher supply current
(~200A supply current) when the enable input is tog-
gled. Avoid this condition by ensuring that EN pin stays
low until the remaining logic inputs are valid. To accom-
plish this, connect a resistor from EN to ground or apply
a low voltage to EN before the other logic inputs go high.
Power Off
When power to the MAX4539/MAX4540 is off (i.e., V+ =
V- = 0), the Absolute Maximum Ratings still apply. This
means that neither logic-level inputs on NO_ nor sig-
nals on COM_ can exceed ±0.3V. Voltages beyond
±0.3V cause the internal ESD-protection diodes to con-
duct, and the parts can be damaged if excessive cur-
rent flows.
Chip Information
TRANSISTOR COUNT: 561
Test Circuits/Timing Diagrams
50%
tR < 20ns
tF < 20ns
VCOM
V+
0V
VNO1, VNO1B
0V
VNO8, VNO4B
LOGIC
INPUT
VEN
SWITCH
OUTPUT
+5V
-5V
GND
V+
A1
A2
V-
EN
LATCH
CAL
A0
NO1
NO2–NO7
NO8
COM
+3V
-3V
50
MAX4539
300
35pF
A1
A0
+5V
VCOM
-5V
GND
V+
V-
EN
NO1B
NO2B–NO3B
NO1A–NO2A
NO4B
COMB
+3V
50
MAX4540
300
35pF
90%
tTRANS
-3V
LATCH
CAL
Figure 1. Transition Time
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