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參數資料
| 型號： | MAX11615EVKIT+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數： | 20/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | KIT EVALUATION FOR MAX11615 |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 系列： | * |
MAX11612–MAX11617
Low-Power, 4-/8-/12-Channel, I2C,
12-Bit ADCs in Ultra-Small Packages
5
Maxim Integrated
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS FOR HIGH-SPEED MODE (CB = 400pF, Note 13)
Serial-Clock Frequency
fSCLH
(Note 14)
1.7
MHz
Hold Time, Repeated START
Condition (Sr)
tHD, STA
160
ns
Low Period of the SCL Clock
tLOW
320
ns
High Period of the SCL Clock
tHIGH
120
ns
Setup Time for a Repeated START
Condition (Sr)
tSU, STA
160
ns
Data Hold Time
tHD, DAT
(Note 11)
0
150
ns
Data Setup Time
tSU, DAT
10
ns
Rise Time of SCL Signal
(Current Source Enabled)
tRCL
20
80
ns
Rise Time of SCL Signal After
Acknowledge Bit
tRCL1
Measured from 0.3VDD - 0.7VDD
20
160
ns
Fall Time of SCL Signal
tFCL
Measured from 0.3VDD - 0.7VDD
20
80
ns
Rise Time of SDA Signal
tRDA
Measured from 0.3VDD - 0.7VDD
20
160
ns
Fall Time of SDA Signal
tFDA
Measured from 0.3VDD - 0.7VDD (Note 12)
20
160
ns
Setup Time for STOP (P) Condition
tSU, STO
160
ns
Capacitive Load for Each Bus Line
CB
400
pF
Pulse Width of Spike Suppressed
tSP
(Notes 11 and 14)
0
10
ns
TIMING CHARACTERISTICS (Figure 1) (continued)
(VDD = 2.7V to 3.6V (MAX11613/MAX11615/MAX11617), VDD = 4.5V to 5.5V (MAX11612/MAX11614/MAX11616), VREF = 2.048V
(MAX11613/MAX11615/MAX11617), VREF = 4.096V (MAX11612/MAX11614/MAX11616), fSCL = 1.7MHz, TA = TMIN to TMAX, unless
otherwise noted. Typical values are at TA = +25°C, see Tables 1–5 for programming notation.) (Note 1)
Note 1: All WLP devices are 100% production tested at TA = +25°C. Specifications over temperature limits are guaranteed by
design and characterization.
Note 2: For DC accuracy, the MAX11612/MAX11614/MAX11616 are tested at VDD = 5V and the
MAX11613/MAX11615/MAX11617are tested at VDD = 3V. All devices are configured for unipolar, single-ended inputs.
Note 3: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and
offsets have been calibrated.
Note 4: Offset nulled.
Note 5: Conversion time is defined as the number of clock cycles needed for conversion multiplied by the clock period. Conversion
time does not include acquisition time. SCL is the conversion clock in the external clock mode.
Note 6: A filter on the SDA and SCL inputs suppresses noise spikes and delays the sampling instant.
Note 7: The absolute input-voltage range for the analog inputs (AIN0–AIN11) is from GND to VDD.
Note 8: When the internal reference is configured to be available at AIN_/REF (SEL[2:1] = 11), decouple AIN_/REF to GND with a
0.1F capacitor and a 2k
series resistor (see the Typical Operating Circuit).
Note 9: ADC performance is limited by the converter’s noise floor, typically 300VP-P.
Note 10: Measured as for the MAX11613/MAX11615/MAX11617:
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MAX11615EVKIT+ | 功能描述:數據轉換 IC 開發(fā)工具 MAX11615 Eval Kit RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11615EVSYS+ | 功能描述:數據轉換 IC 開發(fā)工具 MAX11615 Eval Kit RoHS:否 制造商:Texas Instruments 產品:Demonstration Kits 類型:ADC 工具用于評估:ADS130E08 接口類型:SPI 工作電源電壓:- 6 V to + 6 V |
| MAX11615EWE+ | 制造商:Maxim Integrated Products 功能描述:2.7V TO 3.6V, LOW-POWER, 8-CHANNEL, 2-WIRE SERIAL 12-BIT ADC - Rail/Tube |
| MAX11615EWE+T | 功能描述:模數轉換器 - ADC 12Bit 8Ch 94.4ksps ADC RoHS:否 制造商:Texas Instruments 通道數量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| MAX11616 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:2.7V to 3.6V and 4.5V to 5.5V, Low-Power, 4-/8-/12-Channel, 2-Wire Serial, 12-Bit ADCs |
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