參數(shù)資料
型號(hào): M69AW024BL60ZB8T
廠商: 意法半導(dǎo)體
英文描述: 16 Mbit (1M x16) 3V Asynchronous PSRAM
中文描述: 16兆位(1米× 16)3V的異步移動(dòng)存儲(chǔ)芯片
文件頁(yè)數(shù): 23/29頁(yè)
文件大小: 429K
代理商: M69AW024BL60ZB8T
23/29
M69AW024B
Table 9. Power Down and Power-Up AC Parameters
Note: 1. Some data may be written to any address location if t
EHWH
is less than the minimum required time.
2. The device has to enter and exit Power Down mode after t
CHCL
.
3. The Input Transition Time used in AC measurements is 5ns.
Figure 18. Standby Mode Entry AC Waveforms, After Read or Write
Note: Both t
EHGH
and t
EHWH
define the earliest entry timing for Stand-by mode. If either of timing is not satisfied, it takes the t
AVAX
(min) period
from either the last address transition of A0, A1 and A2, or E1 rising edge.
Symbol
Alt.
Parameter
M69AW024B
Unit
–60
–70
Min
Max
Min
Max
t
CLEL
t
CSP
E2 Low Setup Time for Power Down Entry
10
10
ns
t
ELCH
t
C2LP
E2 Low Hold Time after Power Down Entry
80
90
ns
t
CHEL
t
CHH
E1 High Hold Time following E2 High after Power-
Down Exit (Sleep Mode only)
350
350
μs
t
EHEL
t
CHHP
E1 High Hold Time following E2 High after Power-
Down Exit (not in Sleep Mode)
400
400
μs
t
EHCH1
t
CHS
E1 High Setup Time following E2 High after Power-
Down Exit
10
10
ns
t
EHCH2
t
C2LH
Power-up Time 1
50
50
μs
t
CHCL12
t
CHCL22
t
C2HL
Power-up Time 2
50
50
μs
t
EHGH
t
CHOX
E1 High to G Invalid Time for Standby Entry
10
10
ns
t
EHWH
t
CHWX
E1 High to W Invalid Time for Standby Entry
10
10
ns
t
T
t
T
Input Transition Time
1
25
1
25
ns
AI07741
E1
G
W
tEHGH
tEHWH
Active (Write)
Standby
Active (Read)
Standby
E1
G
W
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