參數資料
型號: M68HC705UGANG
廠商: 飛思卡爾半導體(中國)有限公司
英文描述: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
中文描述: 高密度互補金屬氧化物半導體(HCMOS)微控制器
文件頁數: 38/112頁
文件大?。?/td> 809K
代理商: M68HC705UGANG
4-6
MC68HC05BD3
RESETS AND INTERRUPTS
4
Figure 4-3
External Interrupt Circuit and Timing
+
&
External
Interrupt
Request
Power-On Reset
External Reset
External Interrupt
being serviced
(read of vectors)
D
C
R
Q
Q
V
DD
IRQ pin
I BIT (CCR)
IRQ
t
ILIH
t
ILIL
EDGE SENSITIVE TRIGGER
CONDITION
The minimum pulse width t
ILIH
is one
internal bus period. The period t
ILIL
should not be less than the number of
t
CYC
cycles it takes to execute the
interrupt service routine plus 21 tcyc
cycles.
t
ILIL
Wired ORed
Interrupt signals
IRQ
If after servicing an interrupt the IRQ
pin remains low, then the next interrupt
is recognized. Normally used with wired
OR connection.
Normally used with pull-up resistors for
wired-OR connection.
(b) Interrupt Mode Diagram
(a) Interrupt Function Diagram
LEVEL SENSITIVE TRIGGER
CONDITION
&
+
IRQN bit
TPG
36
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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