參數(shù)資料
型號: M58LV064A
廠商: 意法半導(dǎo)體
英文描述: 64 Mbit 4Mb x16 or 2Mb x32, Uniform Block, Burst 3V Supply Flash Memories
中文描述: 64兆位4Mb的x16或功能的2Mb X32號,統(tǒng)一座,突發(fā)3V電源閃存
文件頁數(shù): 27/65頁
文件大?。?/td> 450K
代理商: M58LV064A
27/65
M58LV064A, M58LV064B
Set Burst Configuration Register Command.
The Set Burst Configuration Register command is
used to write a new value to the Burst Configura-
tion Control Register which defines the burst
length, type, X and Y latencies, Synchronous/
Asynchronous Read mode and the valid Clock
edge configuration.
Two Bus Write cycles are required to issue the Set
Burst Configuration Register command. Once the
command is issued the memory returns to Read
mode as if a Read Memory Array command had
been issued.
The value for the Burst Configuration Register is
always presented on A2-A17, regardless of the
bus width that is selected. M0 is on A2, M1 on A3,
etc.; the other address bits are ignored.
Block Protect Command.
The Block Protect
command is used to protect a block and prevent
Program or Erase operations from changing the
data in it. Two Bus Write cycles are required to is-
sue the Block Protect command; the second Bus
Write cycle latches the block address in the inter-
nal state machine and starts the Program/Erase
Controller. Once the command is issued subse-
quent Bus Read operations read the Status Reg-
ister. See the section on the Status Register for
details on the definitions of the Status Register
bits.
During the Block Protect operation the memory will
only accept the Read Status Register command.
All other commands will be ignored. Typical Block
Protection times are given in Table 11.
The Block Protection bits are non-volatile, once
set they remain set through reset and power-
down/power-up. They are cleared by a Blocks Un-
protect command or temporary disabled by raising
the Reset/Power-Down pin to V
HH
and holding it at
that level throughout a Block Erase or Write to
Buffer and Program command.
Blocks Unprotect Command.
The Blocks Un-
protect command is used to unprotect all of the
blocks. Two Bus Write cycles are required to issue
the Blocks Unprotect command; the second Bus
Write cycle starts the Program/Erase Controller.
Once the command is issued subsequent Bus
Read operations read the Status Register. See the
section on the Status Register for details on the
definitions of the Status Register bits.
During the Block Unprotect operation the memory
will only accept the Read Status Register com-
mand. All other commands will be ignored. Typical
Block Protection times are given in Table 11.
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