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參數(shù)資料
| 型號(hào)： | M58CR064Q12ZB6T |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| 中文描述： | 64兆位4Mb的× 16，雙行，突發(fā)1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 14/70頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | M58CR064Q12ZB6T |
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M58CR064C, M58CR064D, M58CR064P, M58CR064Q
14/70
I
The second latches the block address in the
internal state machine and starts the Program/
Erase Controller.
If the second bus cycle is not Write Erase Confirm
(D0h), Status Register bits SR4 and SR5 are set
and the command aborts. Erase aborts if Reset
turns to V
IL
. As data integrity cannot be guaran-
teed when the Erase operation is aborted, the
block must be erased again.
Once the command is issued the device outputs
the Status Register data when any address within
the bank is read. At the end of the operation the
bank will remain in Read Status Register mode un-
til a Read Array, Read CFI Query or Read Elec-
tronic Signature command is issued.
During Erase operations the bank containing the
block being erased will only accept the Read Sta-
tus Register and the Program/Erase Suspend
command, all other commands will be ignored.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being erased. Typical Erase times are
given in Table 14, Program, Erase Times and Pro-
gram/Erase Endurance Cycles.
See Appendix C, Figure 24, Block Erase Flow-
chart and Pseudo Code, for a suggested flowchart
for using the Block Erase command.
Program Command
The memory array can be programmed word-by-
word. Only one Word in one bank can be pro-
grammed at any one time. Two bus write cycles
are required to issue the Program Command.
I
The first bus cycle sets up the Program
command.
I
The second latches the Address and the Data to
be written and starts the Program/Erase
Controller.
After programming has started, read operations in
the bank being programmed output the Status
Register content.
During Program operations the bank being pro-
grammed will only accept the Read Status Regis-
ter and the Program/Erase Suspend command.
Refer to Dual Operations section for detailed infor-
mation about simultaneous operations allowed in
banks not being programmed. Typical Program
times are given in Table 14, Program, Erase
Times and Program/Erase Endurance Cycles.
Programming aborts if Reset goes to V
IL
. As data
integrity cannot be guaranteed when the program
operation is aborted, the memory location must be
reprogrammed.
See Appendix C, Figure 20, Program Flowchart
and Pseudo Code, for the flowchart for using the
Program command.
Program/Erase Suspend Command
The Program/Erase Suspend command is used to
pause a Program or Block Erase operation. A
Bank Erase operation cannot be suspended.
One bus write cycle is required to issue the Pro-
gram/Erase Suspend command. Once the Pro-
gram/Erase Controller has paused bits SR7, SR6
and/ or SR
2 of the Status Register will be set to ‘1’.
The command must be addressed to the bank
containing the Program or Erase operation.
During Program/Erase Suspend the Command In-
terface will accept the Program/Erase Resume,
Read Array (cannot read the suspended block),
Read Status Register, Read Electronic Signature
and Read CFI Query commands. Additionally, if
the suspend operation was Erase then the Clear
status Register, Program, Block Lock, Block Lock-
Down or Protection Program commands will also
be accepted. The block being erased may be pro-
tected by issuing the Block Lock, Block Lock-
Down or Protection Register Program commands.
Only the blocks not being erased may be read or
programmed correctly. When the Program/Erase
Resume command is issued the operation will
complete. Refer to the Dual Operations section for
detailed information about simultaneous opera-
tions allowed during Program/Erase Suspend.
During a Program/Erase Suspend, the device can
be placed in standby mode by taking Chip Enable
to V
IH
. Program/Erase is aborted if Reset turns to
V
IL
.
See Appendix C, Figure 23, Program Suspend &
Resume Flowchart and Pseudo Code, and Figure
25, Erase Suspend & Resume Flowchart and
Pseudo Code for flowcharts for using the Program/
Erase Suspend command.
Program/Erase Resume Command
The Program/Erase Resume command can be
used to restart the Program/Erase Controller after
a Program/Erase Suspend command has paused
it. One Bus Write cycle is required to issue the
command. The command must be written to the
bank containing the Program or Erase Suspend.
The Program/Erase Resume command changes
the read mode of the target bank to Read Status
Register mode.
If a Program command is issued during a Block
Erase Suspend, then the erase cannot be re-
sumed until the programming operation has com-
pleted. It is possible to accumulate suspend
operations. For example: suspend an erase oper-
ation, start a programming operation, suspend the
programming operation then read the array. See
Appendix C, Figure 23, Program Suspend & Re-
sume Flowchart and Pseudo Code, and Figure 25,
Erase Suspend & Resume Flowchart and Pseudo
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M58CR064Q85ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064Q90ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064QZB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064-ZBT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58DR032C100ZA6T | 功能描述:閃存 32M (4Mx8) 100ns RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
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