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參數(shù)資料
| 型號： | M58CR064PZB |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | 64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| 中文描述： | 64兆位4Mb的× 16，雙行，突發(fā)1.8V電源快閃記憶體 |
| 文件頁數(shù)： | 54/70頁 |
| 文件大?。?/td> | 1000K |
| 代理商： | M58CR064PZB |
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M58CR064C, M58CR064D, M58CR064P, M58CR064Q
54/70
APPENDIX B. COMMON FLASH INTERFACE
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the Read CFI Query Command is issued
the device enters CFI Query mode and the data
structure is read from the memory. Tables 30, 31,
32, 33, 34 and 35 show the addresses used to re-
trieve the data. The Query data is always present-
ed on the lowest order data outputs (DQ0-DQ7),
the other outputs (DQ8-DQ15) are set to 0.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
ten (see Figure 5, Security Block and Protection
Register Memory Map). This area can be access-
ed only in Read mode by the final user. It is impos-
sible to change the security number after it has
been written by ST. Issue a Read Array command
to return to Read mode.
Table 30. Query Structure Overview
Offset
Note: The Flash memory display the CFI data structure when CFI Query command is issued. In this table are listed the main sub-sections
detailed in Tables 31, 32, 33, 34 and 35. Query data is always presented on the lowest order data outputs.
Table 31. CFI Query Identification String
Offset
Sub-section Name
00h
0020h
88CAh
88CBh
8801h
8802h
02h
reserved
03h
reserved
04h-0Fh
reserved
10h
0051h
11h
0052h
12h
0059h
13h
0003h
14h
0000h
15h
offset = P = 0039h
16h
0000h
17h
0000h
18h
0000h
19h
value = A = 0000h
1Ah
0000h
Sub-section Name
Description
00h
Reserved
Reserved for algorithm-specific information
10h
CFI Query Identification String
Command set ID and algorithm data offset
1Bh
System Interface Information
Device timing & voltage information
27h
Device Geometry Definition
Flash device layout
P
Primary Algorithm-specific Extended Query table
Additional information specific to the Primary
Algorithm (optional)
A
Alternate Algorithm-specific Extended Query table
Additional information specific to the Alternate
Algorithm (optional)
80h
Security Code Area
Lock Protection Register
Unique device Number and
User Programmable OTP
Description
Value
ST
Manufacturer Code
01h
Device Code (M58CR064C/D/P/Q)
Top
Bottom
Reserved
Reserved
Reserved
Query Unique ASCII String "QRY"
"Q"
"R"
"Y"
Primary Algorithm Command Set and Control Interface ID code 16
bit ID code defining a specific algorithm
Address for Primary Algorithm extended Query table (see Table 33)
p = 39h
Alternate Vendor Command Set and Control Interface ID Code
second vendor - specified algorithm supported
NA
Address for Alternate Algorithm extended Query table
NA
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M58CR064Q | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064Q10ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064Q12ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064Q85ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
| M58CR064Q90ZB6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:64 Mbit 4Mb x 16, Dual Bank, Burst 1.8V Supply Flash Memory |
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