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參數(shù)資料
| 型號： | M58BW032DT60ZA3T |
| 廠商： | 意法半導體 |
| 英文描述： | 32 Mbit (1Mb x32, Boot Block, Burst) 3.3V Supply Flash Memory |
| 中文描述： | 32兆位（1兆X32號，引導塊，突發(fā)）3.3V電源快閃記憶體 |
| 文件頁數(shù)： | 26/60頁 |
| 文件大?。?/td> | 906K |
| 代理商： | M58BW032DT60ZA3T |
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M58BW032BT, M58BW032BB, M58BW032DT, M58BW032DB
26/60
specific block thus allowing program/erase opera-
tions to this block, regardless of the WP pin status.
Two bus operations are required to issue a Clear
Block Protection Configuration Register com-
mand:
The first cycle writes the setup command
The second write cycle specifies the address
of the block to unprotect and confirms the
command. If the command is not confirmed,
■
■
the sequence is aborted and the device
outputs the Status Register with bits 4 and 5
set to ‘1’.
To unprotect multiple blocks, the Clear Block Pro-
tection Configuration Register command must be
repeated for each block.
Any attempt to unprotect a block already unpro-
tected does not affect its status.
Table 8. Commands
Note: 1. X Don’t Care; RA Read Address, RD Read Data, ID Device Code, IDA Identifier Address, IDD Identifier Data, SRD Status Register
Data, PA Program Address; PD Program Data, QA Query Address, QD Query Data, BA Any address in the Block, BCR Burst Con-
figuration Register value, TPA = Tuning Protection Address, TPC = Tuning Protection Code, N+1 number of Words to program, BA
Block address.
2. The Manufacturer Code, the Device Code, the Burst Configuration Register, and the Block Protection Configuration Register of
each block are read using the Read Electronic Signature command.
3. Cycles 1 and 2 input the first 32 bits of the code, cycles 3 and 4 the second 32 bits of the code.
Command
C
Bus Operations
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
Op.
Addr. Data
Op.
Addr.
Data
Op. Addr. Data Op.
Addr. Data
Read Memory Array
≥
2
Write
X
FFh Read
RA
RD
Read Electronic Signature
(2)
≥
2
Write
X
90h
Read IDA
(1)
IDD
(1)
Read Status Register
1
Write
X
70h
Read Query
≥
2
Write
X
98h
Read
RA
RD
Clear Status Register
1
Write
X
50h
Block Erase
2
Write
55h
20h
Write
BA
D0h
Erase All Main Blocks
2
Write
55h
80h
Write
AAh
D0h
Program
any block
2
Write
AAh
40h
10h
Write
PA
PD
OTP Block
2
Write
AAh
40h
Write
PA
PD
Write to Buffer and Program
N+4 Write
AAh
E8h Write
BA
N
Write
PA
PD Write
X
D0h
Program/Erase Suspend
1
Write
X
B0h
Program/Erase Resume
1
Write
X
D0h
Set Burst Configuration
Register
≥3
Write
X
60h
Write BCRh
03h
Read
RA
RD
Tuning Protection
Program
(3)
4
Write
AAh
48h
Write TPAh TPCh Write AAh
48h Write TPAh TPCh
Tuning Protection Unlock
(3)
4
Write
X
78h
Write TPAh TPCh Write
X
78h Write TPAh TPCh
Set Block Protection
Configuration Register
2
Write
X
60h
Write
BA
01h
Clear Block Protection
Configuration Register
2
Write
X
60h
Write
BA
D0h
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M58BW032DT60ZA6T | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:32 Mbit (1Mb x32, Boot Block, Burst) 3.3V Supply Flash Memory |
| M58BW16F | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16 or 32 Mbit (x 32, boot block, burst) 3.3 V supply Flash memories |
| M58BW16FB4D150 | 制造商:Micron Technology Inc 功能描述:AUTOMOTIVE - Trays |
| M58BW16FB4T3 | 制造商:NUMONYX 制造商全稱:Numonyx B.V 功能描述:16 or 32 Mbit (x 32, boot block, burst) 3.3 V supply Flash memories |
| M58BW16FB4T3F | 功能描述:IC FLASH 16MBIT 45NS 80PQFP RoHS:是 類別:集成電路 (IC) >> 存儲器 系列:- 產(chǎn)品變化通告:Product Discontinuation 26/Apr/2010 標準包裝:136 系列:- 格式 - 存儲器:RAM 存儲器類型:SRAM - 同步，DDR II 存儲容量:18M（1M x 18） 速度:200MHz 接口:并聯(lián) 電源電壓:1.7 V ~ 1.9 V 工作溫度:0°C ~ 70°C 封裝/外殼:165-TBGA 供應商設備封裝:165-CABGA（13x15） 包裝:托盤 其它名稱:71P71804S200BQ |
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