參數資料
型號: M58BF008ZA
廠商: 意法半導體
英文描述: TV 8C 8#20 PIN RECP
中文描述: 8兆位的256Kb X32號,突發(fā)快閃記憶體
文件頁數: 1/36頁
文件大?。?/td> 231K
代理商: M58BF008ZA
1/36
PRELIMINARY DATA
February 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
M58BF008
8 Mbit (256Kb x32, Burst) Flash Memory
I
SUPPLY VOLTAGE
– V
DD
= 5V Supply Voltage
– V
DDQ
= 3.3V Input/Output Supply Voltage
– OptionalV
PP
= 12V for fast Program and Erase
I
CONFIGURABLE OPTIONS
– Synchronous or Asynchronous write mode
– Burst Wrap/No-wrap default
– Critical Word X (3 or 4) and Burst Word
Y (1 or 2) latency times
I
ACCESS TIME
– Synchronous X-Y-Y-Y Burst Read
up to 40MHz
– Asynchronous Read: 100ns
I
PROGRAMMING TIME: 10
μ
s typical
I
MEMORY BLOCKS
– 32 equal Main blocks of 256 Kbit
– One Overlay block of 256 Kbit
I
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code: F0h
– Version Code: 0-7h
DESCRIPTION
The M58BF008 is a family of 8 Mbit non-volatile
Flash memories that can be erased electrically at
the blocklevel and programmed in-system. Family
members are configured during product testing for
a specific Synchronous or Asynchronous Write
mode, a Burst default of Wrap or No-wrap and for
Critical Word X = 3 or 4 and Burst Word Y = 1 or 2
latency times. The Main memory array matrix al-
lows each of the 32 equal blocks of 256 Kbit to be
erased separately and re-programmed without af-
fecting other blocks. The memory features a
256 Kbit Overlay block having the same address
space asthe firstMain memory block. The Overlay
block provides a secure storage area that is con-
trolled by special Instructions and an external in-
put. A separate supply V
DDQ
allows the Input/
Output signals to be at 3.3Vlevels, while the main
supply V
DD
is 5V.
Figure 1. Logic Diagram
18
A17-A0
CLK
DQ31-DQ0
VDD
E
VSS
32
LBA
WR
VDDQVPP
W
G
GD
BAA
RP
AI02656B
VSSQ
M58BF008
BGA
LBGA80 (ZA)
10 x 8 solder balls
PQFP80 (D)
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