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參數(shù)資料
| 型號： | M54HC86F1R |
| 廠商： | 意法半導體 |
| 英文描述： | QUAD EXCLUSIVE OR GATE |
| 中文描述： | 四異或門 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 232K |
| 代理商： | M54HC86F1R |
M54HC86
M74HC86
December1992
QUAD EXCLUSIVE OR GATE
B1R
(Plastic Package)
ORDER CODES :
M54HC86F1R
M74HC86B1R
M74HC86M1R
M74HC86C1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
No Internal
Connection
INPUT AND OUTPUT EQUIVALENT CIRCUIT
.
HIGH SPEED
t
PD
= 10 ns(TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 1
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
= I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN ANDFUNCTION COMPATIBLE
WITH 54/74LS86
The M54/74HC86 is a high speed CMOS QUAD
EXCLUSIVE OR GATE fabricated in silicon gate
C
2
MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
Input and output buffer are installed, which enables
high noise immunity and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
DESCRIPTION
1/9
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