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參數(shù)資料
| 型號： | M38273M7MXXXGP |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | Dual Low-Power, Rail-to-Rail Input/Output Operational Amplifier w/Shutdown 20-LCCC -55 to 125 |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 30/70頁 |
| 文件大?。?/td> | 1112K |
| 代理商： | M38273M7MXXXGP |
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30
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3827 Group
MITSUBISHI MICROCOMPUTERS
Fig. 28 Timing of serial I/O2 function
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
Transfer clock
(Note 1)
Serial I/O2 output S
OUT2
Serial I/O2 input S
IN2
Serial I/O2 register
write signal
(Note 2)
Serial I/O2 interrupt request bit set
1:
When the internal clock is selected as the transfer clock, the divide ratio can be selected by setting bits 0 to 2 of the serial
I/O2 control register.
2:
When the internal clock is selected as the transfer clock, the S
pin goes to high impedance after transfer completion.
When the external clock is selected as the transfer clock, a content of the serial I/O shift register is continued to shift
during inputting a transfer clock. The S
OUT2
pin does not go to high impedance after transfer completion.
Notes
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