參數資料
型號: M3822
廠商: Mitsubishi Electric Corporation
英文描述: Single Chip 8 Bits Microcomputer(8位單片機)
中文描述: 單芯片8位單片機(8位單片機)
文件頁數: 24/52頁
文件大?。?/td> 781K
代理商: M3822
24
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3822 Group
SERIAL I/O
Serial I/O can be used as either clock synchronous or asynchro-
nous (UART) serial I/O. A dedicated timer (baud rate generator) is
also provided for baud rate generation.
Clock Synchronous Serial I/O Mode
Clock synchronous serial I/O mode can be selected by setting the
mode selection bit of the serial I/O control register to “1”.
For clock synchronous serial I/O, the transmitter and the receiver
must use the same clock. If an internal clock is used, transfer is
started by a write signal to the TB/RB (address 0018
16
).
Fig. 15 Block diagram of clock synchronous serial I/O
Fig. 16 Operation of clock synchronous serial I/O function
P4
6
/S
CLK1
P4
7
/S
RDY1
P4
4
/R
X
D
P4
5
/T
X
D
f(X
IN
)
1/4
1/4
F/F
Serial I/O status register
Serial I/O control register
Receive buffer
Address 0018
16
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Clock control circuit
Shift clock
Serial I/O synchronization
clock selection bit
Frequency division ratio 1/(n+1)
Baud rate generator
Address 001C
16
BRG count source selection bit
Clock control circuit
Falling-edge detector
Data bus
Address 0018
16
Shift clock
Transmit shift register shift completion flag (TSC)
Transmit interrupt source selection bit
Transmit buffer empty flag (TBE)
Address 0019
16
Serial I/O transmit interrupt request (TI)
Data bus
Address 001A
16
Transmit buffer register (TB)
Transmit shift register
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
RBF = 1
TSC = 1
Overrun error (OE)
detection
TBE = 0
TBE = 1
TSC = 0
Transfer shift clock
(1/2 to 1/2048 of the internal
clock, or an external clock)
Serial output T
X
D
Serial input R
X
D
Write signal to receive/transmit
buffer register (address 0018
16
)
Notes 1 :
The transmit interrupt (TI) can be selected to occur either when the transmit buffer register has emptied (TBE=1)
or after the transmit shift operation has ended (TSC=1), by setting the transmit interrupt source selection bit (TIC) of the
serial I/O control register.
2 :
If data is written to the transmit buffer register when TSC=0, the transmit clock is generated continuously and serial data is
output continuously from the T
X
D pin.
3 :
The receive interrupt (RI) is set when the receive buffer full flag (RBF) becomes “1” .
Receive enable signal S
RDY1
D
7
D
0
D
1
D
2
D
3
D
4
D
5
D
6
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