參數(shù)資料
型號(hào): M29W160DB90N1T
廠商: 意法半導(dǎo)體
英文描述: Dual Positive-Edge-Triggered D-Type Flip-Flop 8-DSBGA -40 to 85
中文描述: 16兆位的2Mb x8或1兆x16插槽,啟動(dòng)塊3V電源快閃記憶體
文件頁(yè)數(shù): 24/40頁(yè)
文件大小: 665K
代理商: M29W160DB90N1T
M29W160ET, M29W160EB
24/40
Figure 13. Write AC Waveforms, Chip Enable Controlled
Table 14. Write AC Characteristics, Chip Enable Controlled
Note: 1. Sampled only, not 100% tested.
Symbol
Alt
Parameter
M29W160E
Unit
70
90
t
AVAV
t
WC
Address Valid to Next Address Valid
Min
70
90
ns
t
WLEL
t
WS
Write Enable Low to Chip Enable Low
Min
0
0
ns
t
ELEH
t
CP
Chip Enable Low to Chip Enable High
Min
45
50
ns
t
DVEH
t
DS
Input Valid to Chip Enable High
Min
45
50
ns
t
EHDX
t
DH
Chip Enable High to Input Transition
Min
0
0
ns
t
EHWH
t
WH
Chip Enable High to Write Enable High
Min
0
0
ns
t
EHEL
t
CPH
Chip Enable High to Chip Enable Low
Min
30
30
ns
t
AVEL
t
AS
Address Valid to Chip Enable Low
Min
0
0
ns
t
ELAX
t
AH
Chip Enable Low to Address Transition
Min
45
50
ns
t
GHEL
Output Enable High Chip Enable Low
Min
0
0
ns
t
EHGL
t
OEH
Chip Enable High to Output Enable Low
Min
0
0
ns
t
EHRL (1)
t
BUSY
Program/Erase Valid to RB Low
Max
30
35
ns
t
VCHWL
t
VCS
V
CC
High to Write Enable Low
Min
50
50
μs
AI02924
E
G
W
A0-A19/
A–1
DQ0-DQ7/
DQ8-DQ15
VALID
VALID
VCC
tVCHWL
tEHWH
tEHEL
tWLEL
tAVEL
tEHGL
tELAX
tEHDX
tAVAV
tDVEH
tELEH
tGHEL
RB
tEHRL
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