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參數(shù)資料
型號: LTC2262CUJ-12#TRPBF
廠商: Linear Technology
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC ADC 12BIT 150MSPS 40-QFN
標(biāo)準(zhǔn)包裝: 2,000
位數(shù): 12
采樣率(每秒): 150M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 146mW
電壓電源: 單電源
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 40-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 40-QFN(6x6)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 1 個差分
配用: DC890B-ND - BOARD USB DATA COLLECTION
LTC2262-12
19
226212fc
For more information www.linear.com/LTC2262-12
Digital Output Randomizer
Interference from the A/D digital outputs is sometimes
unavoidable.Digitalinterferencemaybefromcapacitiveor
inductive coupling or coupling through the ground plane.
Even a tiny coupling factor can cause unwanted tones
in the ADC output spectrum. By randomizing the digital
output before it is transmitted off chip, these unwanted
tones can be randomized which reduces the unwanted
tone amplitude.
The digital output is “randomized” by applying an exclu-
sive-OR logic operation between the LSB and all other
data output bits. To decode, the reverse operation is ap-
plied—an exclusive-OR operation is applied between the
LSB and all other bits. The LSB, OF and CLKOUT outputs
are not affected. The output randomizer is enabled by
serially programming mode control register A4.
Alternate Bit Polarity
Another feature that reduces digital feedback on the circuit
board is the alternate bit polarity mode. When this mode
is enabled, all of the odd bits (D1, D3, D5, D7, D9, D11)
are inverted before the output buffers. The even bits (D0,
D2, D4, D6, D8, D10), OF and CLKOUT are not affected.
This can reduce digital currents in the circuit board ground
plane and reduce digital noise, particularly for very small
analog input signals.
When there is a very small signal at the input of the A/D
thatiscenteredaroundmidscale,thedigitaloutputstoggle
between mostly 1s and mostly 0s. This simultaneous
switching of most of the bits will cause large currents in
the ground plane. By inverting every other bit, the alter-
nate bit polarity mode makes half of the bits transition
high while half of the bits transition low. To first order,
this cancels current flow in the ground plane, reducing
the digital noise.
APPLICATIONS INFORMATION
CLKOUT
OF
D11/D0
D10/D0
D2/D0
D1/D0
D0
226212 F15
OF
D11
D10
D2
D1
D0
RANDOMIZER
ON
D11
FPGA
PC BOARD
D10
D2
D1
D0
226212 F15
D0
D1/D0
D2/D0
D10/D0
D11/D0
OF
CLKOUT
LTC2262-12
Figure 15. Functional Equivalent of Digital Output Randomizer
Figure 16. Unrandomizing a Randomized Digital
Output Signal
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