
SMSC LPC47B27x
- 154 -
Rev. 08-10-04
DATASHEET
INDEX
TYPE
HARD
RESET
0x00,
0x00
0x00,
0x00
0x00
VCC POR
TR POR
SOFT
RESET
0x00,
0x00
0x00,
0x00
0x00
CONFIGURATION
REGISTER
0x60,
0x61
0x62,
0x63
0x70
R/W
0x00,
0x00
0x00,
0x00
0x00
0x00,
0x00
0x00,
0x00
0x00
Primary Base I/O
Address
CIrCC Base I/O
Address
Primary Interrupt
Select
DMA Channel Select
Serial Port 2 Mode
Register
IR Options Register
IR Half Duplex
Timeout
R/W
R/W
0x74
0xF0
R/W
R/W
0x04
0x00
0x04
0x00
0x04
0x00
0x04
-
0xF1
0xF2
R/W
R/W
0x02
0x03
0x02
0x03
0x02
0x03
-
-
LOGICAL DEVICE 6 CONFIGURATION REGISTERS (Reserved)
LOGICAL DEVICE 7 CONFIGURATION REGISTERS (Keyboard)
0x00
0x00
0x00
0x00
0x30
0x70
R/W
R/W
0x00
0x00
0x00
0x00
Activate
Primary Interrupt
Select (Keyboard)
Secondary Interrupt
Select (Mouse)
KRESET and GateA20
Select
0x72
R/W
0x00
0x00
0x00
0x00
0xF0
R/W
0x00
(Note 2)
0x00
(Note 2)
0x00
-
LOGICAL DEVICE 8 CONFIGURATION REGISTERS (Reserved)
LOGICAL DEVICE 9 CONFIGURATION REGISTERS (Game Port)
0x00
0x00
0x00,
0x00
0x00
0x30
0x60,
0x61
R/W
R/W
0x00
0x00,
0x00
0x00
0x00,
0x00
Activate
Primary Base I/O
Address,
GAME_PORT
0x00,
LOGICAL DEVICE A CONFIGURATION REGISTERS (Runtime Registers)
R/W
0x00
0x00
R/W
0x00,
0x00
0x00
R/W
-
-
R/W
-
-
LOGICAL DEVICE B CONFIGURATION REGISTERS (MPU-401)
R/W
0x00
0x00
R/W
0x03
0x03
0x03
0x30
0x60,
0x61
0XF0
0xF1
0x00
0x00,
0x00
0X00
0x00
0x00
0x00,
0x00
-
-
Activate
Primary Base I/O
Address PME_BLK
CLOCKI32
FDC_PP
0x00,
0x30
0x60,
0x00
0x00
Activate
MPU-401 Primary
Base I/O Address High
Byte
MPU-401 Primary
Base I/O Address Low
Byte
Primary Interrupt
Select
0x03
0x61
R/W
0x30
0x30
0x30
0x30
0x70
R/W
0x05
0x05
0x05
0x05
Note:
Note 1: CR22 bit 5 and bit 7 are reset on VTR only.
Note 2. Bits[6:5] reset on VTR POR only.
Chip Level (Global) Control/Configuration Registers[0x00-0x2F]
The chip-level (global) registers lie in the address range [0x00-0x2F]. The design MUST use all 8 bits of
the ADDRESS Port for register selection. All unimplemented registers and bits ignore writes and return
zero when read.
The INDEX PORT is used to select a configuration register in the chip. The DATA PORT is then used to
access the selected register. These registers are accessible only in the Configuration Mode.
Reserved registers are read-only, reads return 0.