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參數(shù)資料
| 型號： | LPC2220 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 16/32-bit ARM microcontrollers; flashless with 64 kB, with 10-bit ADC and external memory interface |
| 中文描述： | 16/32位 ARM微控制器；64KB的閃存；10位模數(shù)轉換和外部存儲器接口 |
| 文件頁數(shù)： | 21/49頁 |
| 文件大?。?/td> | 255K |
| 代理商： | LPC2220 |
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9397 750 14061
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02— 30 May 2005
21 of 49
Philips Semiconductors
LPC2210/2220
16/32-bit ARM microcontrollers with external memory interface
6.8 Pin function select register 2 (PINSEL2 - 0xE002 C014)
The PINSEL2 register controls the functions of the pins as per the settings listed in
Table 9
. The direction control bit in the IODIR register is effective only when the GPIO
function is selected for a pin. For other functions direction is controlled automatically.
Settings other than those shown in the
Table 9
are reserved, and should not be used.
Table 9:
PINSEL2 bits
1:0
2
Pin function select register 2 (PINSEL2 - 0xE002 C014)
Description
reserved.
When 0, pins P1[36:26] are used as GPIO pins. When 1, P1[31:26] are used as a
Debug port.
When 0, pins P1[25:16] are used as GPIO pins. When 1, P1[25:16] are used as a
Trace port.
Controls the use of the data bus and strobe pins:
Pins P2[7:0]
11 = P2[7:0]
Pin P1.0
11 = P1.0
Pin P1.1
11 = P1.1
Pin P3.31
11 = P3.31
Pins P2[15:8]
00 or 11 = P2[15:8]
Pin P3.30
00 or 11 = P3.30
Pins P2[27:16]
0x or 11 = P2[27:16]
Pins P2[29:28]
0x or 11 = P2[29:28] or reserved
Pins P2[31:30]
0x or 11 = P2[31:30] or AIN5:4
Pins P3[29:28]
0x or 11 = P3[29:28] or AIN6:7
If bits 5:4 are not 10, controls the use of pin P3.29: 0 enables P3.29, 1 enables
AIN6.
If bits 5:4 are not 10, controls the use of pin P3.28: 0 enables P3.28, 1 enables
AIN7.
Controls the use of pin P3.27: 0 enables P3.27, 1 enables WE.
reserved.
Controls the use of pin P3.26: 0 enables P3.26, 1 enables CS1.
reserved.
If bits 27:25 are not 111, controls the use of pin P3.23/A23/XCLK: 0 enables P3.23,
1 enables XCLK.
Controls the use of pin P3.25: 00 enables P3.25, 01 enables CS2, 10 and 11 are
reserved values.
Controls the use of pin P3.24: 00 enables P3.24, 01 enables CS3, 10 and 11 are
reserved values.
reserved.
If bits 5:4 are not 10, controls the use of pin P2[29:28]: 0 enables P2[29:28], 1 is
reserved
If bits 5:4 are not 10, controls the use of pin P2.30: 0 enables P2.30, 1 enables
AIN4.
If bits 5:4 are not 10, controls the use of pin P2.31: 0 enables P2.31, 1 enables
AIN5.
Reset value
-
P1.26/RTCK
3
P1.20/
TRACESYNC
BOOT1:0
5:4
0x or 10 = D7 to D0
0x or 10 = CS0
0x or 10 = OE
0x or 10 = BLS0
01 or 10 = D15:8
01 or 10 = BLS1
10 = D27 to D16
10 = D29, D28
10 = D31, D30
10 = BLS2, BLS3
6
1
7
1
8
10:9
11
12
13
0
-
0
-
0
15:14
00
17:16
00
19:18
20
-
0
21
1
22
1
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