參數(shù)資料
型號(hào): LMX2335UTMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 1200 MHz, PDSO16
封裝: PLASTIC, TSSOP-16
文件頁數(shù): 43/48頁
文件大?。?/td> 3127K
代理商: LMX2335UTMX
2.0 Programming Description
(Continued)
2.8 F
o
LD[3:0]
The F
o
LD control word is used to select which signal is routed to the F
o
LD pin.
MULTI-FUNCTION OUTPUT SELECT
[RF1 R[20], RF2 R[20], RF1 R [21], RF2 R[21]]
F
o
LD3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
F
o
LD2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
F
o
LD1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
F
o
LD0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
F
o
LD Output State
LOW Logic State Output
RF2 PLL R Divider Output, Push-Pull Output
RF1 PLL R Divider Output, Push-Pull Output
Open Drain Fastlock Output
RF2 PLL Analog Lock Detect, Push-Pull Output
RF2 PLL N Divider Output, Push-Pull Output
RF1 PLL N Divider Output, Push-Pull Output
Reset RF2 Counters, LOW Logic State Output
RF1 Analog Lock Detect, Push-Pull Output
RF2 PLL R Divider Output, Push-Pull Output
RF1 PLL R Divider Output, Push-Pull Output
Reset RF1 Counters, LOW Logic State Output
RF1 and RF2 Analog Lock Detect, Push-Pull Output
RF2 PLL N Divider Output, Push-Pull Output
RF1 PLL N Divider Output, Push-Pull Output
Reset All Counters, LOW Logic State Output
L
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相關(guān)PDF資料
PDF描述
LMX2335USLBX PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
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LMX2336 PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications
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