參數(shù)資料
型號: LM7171AMJ-QML
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 運算放大器
英文描述: JT 55C 55#20 SKT RECP
中文描述: OP-AMP, 7000 uV OFFSET-MAX, 200 MHz BAND WIDTH, CDIP8
封裝: CERAMIC, DIP-8
文件頁數(shù): 14/20頁
文件大?。?/td> 615K
代理商: LM7171AMJ-QML
Termination
(Continued)
To minimize reflection, coaxial cable with matching charac-
teristic impedance to the signal source should be used. The
other end of the cable should be terminated with the same
value terminator or resistor. For the commonly used cables,
RG59 has 75
characteristic impedance, and RG58 has
50
characteristic impedance.
Driving Capacitive Loads
Amplifiers driving capacitive loads can oscillate or have ring-
ing at the output. To eliminate oscillation or reduce ringing,
an isolation resistor can be placed as shown below in Figure
5 The combination of the isolation resistor and the load ca-
pacitor forms a pole to increase stability by adding more
phase margin to the overall system. The desired perfor-
mance depends on the value of the isolation resistor; the big-
ger the isolation resistor, the more damped the pulse re-
sponse becomes. For LM7171, a 50
isolation resistor is
recommended for initial evaluation. Figure 6 shows the
LM7171 driving a 150 pF load with the 50
isolation resistor.
Power Dissipation
The maximum power allowed to dissipate in a device is de-
fined as:
P
D
= (T
J(max)
T
A
)/
θ
JA
Where
PD
is the power dissipation in a device
T
J(max)
is the maximum junction temperature
T
A
is the ambient temperature
θ
JA
is the thermal resistance of a particular package
For example, for the LM7171 in a SO-8 package, the maxi-
mum power dissipation at 25C ambient temperature is
730 mW.
Thermal resistance,
θ
, depends on parameters such as
die size, package size and package material. The smaller
the die size and package, the higher
θ
becomes. The 8-pin
DIP package has a lower thermal resistance (108C/W) than
that of 8-pin SO (172C/W). Therefore, for higher dissipation
capability, use an 8-pin DIP package.
The total power dissipated in a device can be calculated as:
P
D
= P
Q
+ P
L
P
is the quiescent power dissipated in a device with no load
connected at the output. P
is the power dissipated in the de-
vice with a load connected at the output; it is not the power
dissipated by the load.
Furthermore,
P
Q
:
=
supply current x total supply voltage with no load
P
L
:
=
output current x (voltage difference between
supply voltage and output voltage of the same
side of supply voltage)
DS012385-17
FIGURE 3. Properly Terminated Signal
DS012385-18
FIGURE 4. Improperly Terminated Signal
DS012385-12
FIGURE 5. Isolation Resistor Used
to Drive Capacitive Load
DS012385-13
FIGURE 6. The LM7171 Driving a 150 pF Load
with a 50
Isolation Resistor
www.national.com
14
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