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參數(shù)資料
| 型號(hào)： | LC9947G |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDFM20 |
| 封裝： | PLASTIC, DIP-20 |
| 文件頁(yè)數(shù)： | 4/9頁(yè) |
| 文件大?。?/td> | 101K |
| 代理商： | LC9947G |
Clock Voltage at frame shift frequency = 3.58 MHz
Fig. 1
Fig. 2
Bias Conditions
Note: 1. This level must not become higher than the substrate pulse low level VLSUB.
2. These input pins are in high impedance state.
DC Characteristics
No. 4971-4/9
LC9947G
Note:
* A 47 pF capacitor must be inserted as shown in figure 2.
** Adjust the VHNS saturation output to its maximum value without causing picture degradation.
Shutter pulse
Slice pulse
Vertical driver
IC
LB89901V
Timing
IC
LC99012A
Charge sweep pulse
One field
Imaging area pulse
Frame
shift
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
P-well
VPW
0V
Output circuit voltage
VDD
*1
14.5
15.0
15.5
V
VGG
*2
0.5
0.8
1.1
V
OG bias
VOG
*2
4.5
5.0
5.5
V
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
DC operating current
IDD
2.5
4.5
6.5
mA
Ratings
Parameter
Symbol
Conditions
min
typ
max
Unit
Imaging block pulses: 1, 2, 3, 4
Pulse amplitude
VPIF
*
14.0
14.5
15.0
V
Low level
VLIF
*
–10.0
–9.5
–9.0
V
Storage block pulses: S1, S2
Pulse amplitude
VPSL
14.0
14.5
15.0
V
Low level
VLSL
–7.0
–6.5
–6.0
V
Storage block pulses: S3, S4
Pulse amplitude
VPSL
14.0
14.5
15.0
V
Low level
VLSL
–8.0
–7.5
–7.0
V
Horizontal transfer pulses: H1, H2
Pulse amplitude
VPH
4.5
5.0
5.5
V
Low level
VLH
00
0.5
V
Reset gate: R
Pulse amplitude
VPR
4.5
5.0
5.5
V
Low level
VLR
3.6
4.0
4.4
V
Substrate pulse: NSUB
High level
VHSUB**
See Figure 1
30.0
40.0
V
Low level
VLSUB
See Figure 1
17.5
18.0
18.5
V
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