
LB11691
No.A0879-13/21
4. Control method
The output duty is determined from comparison between the PWM oscillation waveform and TOC pin voltage. The
duty becomes 0% when the TOC pin voltage is about 1.2V or less and 100% when the pin voltage is about 3.0V or
more.
Normally, the integrating amplifier is used as a full return amplifier (EI- pin
and TOC pin connected) and the control voltage is entered to EI+ pin. (The
output duty increases with increasing EI+ pin voltage.) At resetting with the
RES pin, the EI+ pin is lowered approximately to the GND voltage by IC
internal TR (for capacitor discharge). Therefore, always enter the voltage via
resistor, instead of direct connection of the low-impedance power. Also
connect a pull-down resistor between the EI+ pin and GND to prevent the
motor from being driven when the control voltage is open. When the control
voltage contains noise or in order to suppress sudden fluctuation of the control
voltage, connect a capacitor between the EI+ pin and GND to remove the
noise. The operating voltage range of control input can be widened by
entering the voltage divided by the resistor into the EI+ pin, as shown in the
figure right.
To perform control while keeping the rotation speed constant to a certain
degree under load fluctuation, the speed control circuit with FV pin output
may be formed as shown in the right. Select a 25k
Ω
or more resistance to be
inserted between FV and EI- pins. Select the return capacitor capacity so that
the TOC pin voltage is sufficiently stable at low speed.
5. Charge pump circuit
The voltage is raised by the charge pump circuit, generating the gate voltage of upper output FET. The voltage is raised
by a capacitor CP connected between CP1 and CP2 pins, accumulating the charge in the capacitor CB between VB and
VCC pins. The capacitance value of CP and CB must always have the following relationship :
CB
≥
4
×
CP
CP capacitor charge and discharge are made on the basis of PWM cycle. Though the VB power supply current capacity
increases with increasing capacity of the CP capacitor, excessively large capacity may cause faulty charge/discharge
operation. The VB voltage becomes more stable when the CB capacitor capacity is larger, but excessively large
capacity causes longer time of VB voltage generation at a time of power ON. Set the capacity of CP and CB by
referring to the table below.
When the VCC voltage decreases below 20V, the current capacity of VB power supply deteriorates suddenly, causing
drop of VB voltage. Therefore, due care must be taken when designing.
VCC voltage
CP
24V
36V
0.1
μ
F
6800pF
CB
1
μ
F
0.47
μ
F
6. Hall input signal
Connect the Hall IC output to the Hall input. As an about 10k
Ω
pull-up
resistor is incorporated for the 5V regulator, it is normally not necessary to
connect the pull-up resistor externally. If the Hall IC with built-in pull-up
resistor is used, it is enough to use the Hall IC power supply with 5V. If the
Hall IC power supply is to be used with 12V, it is necessary to add the
pull-down resistor or voltage clamp Zener diode to prevent application of
voltage of 5V or more to the Hall input.
The input is a comparator input with about 0.9V hysteresis width. If the
noise presents problem, connect a noise removing capacitor between the
input and GND.
When three inputs of Hall input signal are in the same input condition, both upper and lower outputs are turned OFF.
+
-
To FV pin
TOC
EI-
EI+
Control voltage
Control voltage
+
-
TOC
EI-
EI+
Hall IC
12V
5V
IN
LB11691