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| 型號： | LB-9 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Universal Balancing Techniques |
| 中文描述： | 通用平衡技術(shù) |
| 文件頁數(shù)： | 2/3頁 |
| 文件大小： | 73K |
| 代理商： | LB-9 |
A voltage follower may be balanced by the technique shown
in
Figure 4
. R
1
injects a current which produces a voltage
drop across R
to cancel the offset voltage. The addition of
the adjustment resistors causes a gain error, increasing the
gain by 0.05%. This small error usually causes no problem.
The adjustment circuit essentially causes the offset voltage
to appear at full output, rather than at low output levels,
where it is a large percentage error.
Differential amplifiers are somewhat more difficult to bal-
ance. The offset adjustment used for a differential amplifier
can degrade the common mode rejection ratio.
Figure 5
shows an adjustment circuit which has minimal effect on the
common mode rejection. The voltage at the arm of the pot is
divided by R
4
and R
5
to supply an offset correction of
±
7.5
mV. R
4
and R
5
are chosen such that the common mode
rejection ratio is limited by the amplifer for values of R
3
greater than 1 k
. If R
3
is less than 1k the shunting of R
4
by
R
5
must be considered when choosing the value of R
3
.
The techniques described for balancing offset voltage at the
input of the amplifier offer two main advantages: First, they
are universally applicable to all operational amplifiers and
allow device interchangeability with no modifications to the
balance circuitry. Second, they permit balancing without in-
terfering with the internal circuitry of the amplifier. The elec-
trical parameters of the amplifiers are tested and guaranteed
without balancing. Although it doesn’t usually happen, bal-
ancing could degrade performance.
00846003
FIGURE 3. Offset Voltage Adjustment for
Non-Inverting Amplifiers
00846004
FIGURE 4. Offset Voltage Adjustment for
Voltage Followers
00846005
FIGURE 5. Offset Voltage Adjustment for
Differential Amplifiers
L
www.national.com
2
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