參數(shù)資料
型號: L6740L
廠商: STMICROELECTRONICS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1 MM HEIGHT, HTQFP-48
文件頁數(shù): 31/44頁
文件大?。?/td> 755K
代理商: L6740L
L6740L
System control loop compensation
9
System control loop compensation
The device embeds two separate and independent control loops for CORE and NB section.
The control loop for NB section is a simple voltage-mode control loop with (optional) voltage
positioning featured when DROOP pin is shorted with FB. The control loop for the CORE
section also features a current-sharing loop to equalize the current carried by each of the
configured phases.
The CORE control system can be modeled with an equivalent single-phase converter
whose only difference is the equivalent inductor L/N (where each phase has an L inductor
and N is the number of the configured phases). See Figure 16.
Figure 16.
Equivalent control loop for NB and CORE sections
This means that the same analysis can be used for both the sections with the only exception
of the different equivalent inductor value (L = LNB for NB section and L = LCORE/N for the
CORE section) and the current reading gain (RDS(on)/RISEN for NB section and DCR/RG for
the CORE section).
The control loop gain results (obtained opening the loop after the COMP pin):
Where:
RLL is the equivalent output resistance determined by the droop function;
ZP(s) is the impedance resulting by the parallel of the output capacitor (and its ESR)
and the applied load RO;
ZF(s) is the compensation network impedance;
ZL(s) is the equivalent inductor impedance;
A(s) is the error amplifier gain;
is the PWM transfer function.
The control loop gain for each section is designed in order to obtain a high DC gain to
minimize static error and to cross the 0 dB axes with a constant -20 dB/Dec. slope with the
desired crossover frequency
ω
T. Neglecting the effect of ZF(s), the transfer function has one
zero and two poles; both the poles are fixed once the output filter is designed (LC filter
resonance
ω
LC) and the zero (ωESR) is fixed by ESR and the Droop resistance.
Ref
NB_FB
NB_COMP
NB_VSEN
NB_FBG
RF_NB CF-NB
RFB_NB
NB_DR
OOP
PWM
LNB
ESR_NB
CO_NB
R
O_NB
d VNB_COMP
VOUT_NB
ZF(s)
ZFB(s)
I DR
OOP_NB
VID_NB
V
NB_COMP
Ref
FB
COMP
VSEN
FBG
RF
CF
RFB
DR
OOP
PWM
LCORE/N
ESR
CO
R
O
d VCOMP
VOUT
ZF(s)
ZFB(s)
I DR
OOP
VID_CORE
V
COMP
G
LOOP s
()
PWM Z
F s
() R
LL
Z
P s
()
+
()
Z
P s
() Z
L s
()
+
[]
Z
F s
()
As
()
--------------
1
As
()
------------
+
R
FB
+
-------------------------------------------------------------------------------------------------------------------
=
PWM
9
10
------
V
IN
ΔV
OSC
-------------------
=
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