參數(shù)資料
型號: L6740L
廠商: STMICROELECTRONICS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1 MM HEIGHT, HTQFP-48
文件頁數(shù): 20/44頁
文件大?。?/td> 755K
代理商: L6740L
L6740L
Output voltage positioning
6.6
NB section - load-line and load-indicator (optional)
This method introduces a dependence of the output voltage on the load current recovering
part of the drop due to the output capacitor ESR in the load transient. Introducing a depen-
dence of the output voltage on the load current, a static error, proportional to the output cur-
rent, causes the output voltage to vary according to the sensed current.
Figure 10 shows the current sense circuit used to implement the load-line. The current flow-
ing across the low-side MOSFET is read through RISEN. RISEN programs a trans conduc-
tance gain and generates a current IISEN proportional to the current delivered by the NB
section that is then sourced by the NB_FB pin (IDROOP_NB). RFB_NB gives the final gain to
program the desired load-line slope (Figure 9).
The output characteristic vs. load current is then given by (Offset disabled):
Where RLL_NB is the resulting Load-Line resistance implemented by the NB section.
The whole power supply can be then represented by a “real” voltage generator with an
equivalent output resistance RLL_NB and a voltage value of VID.
RFB_NB resistor can be then designed according to the RLL_NB specifications as follow:
Caution:
Load-line (DROOP) implementation is optional, in case it is not desired, the resulting current
information may be employed for other purposes, such as load indicator (LI). In this case,
simply connect a resistor RLI_NB to SGND: the resulting voltage drop across RLI_NB will be
proportional to the delivered current according to the following relationship:
Note:
Split between RFB_COMP_NB and RFB_DROOP_NB (Figure 9) is useful in custom designs
where the Droop effect is minimum (i.e. < 50 mV over 100 A) to simplify the compensation
network design.
6.7
NB section - offset (optional)
The NB_OS pin allows programming a positive offset (VOS_NB) for the NB section output
voltage by connecting a resistor ROS_NB to SGND. The pin is internally fixed at 1.240 V so a
current is programmed by connecting the resistor ROS_NB between the pin and SGND: this
current is mirrored and then properly sunk from the NB_FB pin as shown in Figure 9. Output
voltage is then programmed as follow:
Offset resistor can be designed by considering the following relationship (RFB_NB may be
fixed by the droop effect):
V
OUT_NB
VID
R
FB_NB
I
DROOP_NB
VID
R
FB_NB
R
dsON
R
ISEN
----------------- I
OUT
VID
R
LL_NB
I
OUT_NB
==
=
R
FB_NB
R
LL_NB
R
ISEN
R
dsON
-----------------
=
V
NB_DROOP
R
LI_NB
R
dsON
R
ISEN
----------------- I
OUT_NB
=
V
NB
VID
R
FB_NB
I
DROOP_NB IOS_NB
()
=
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