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參數(shù)資料
| 型號： | L6590N |
| 廠商： | 意法半導體 |
| 英文描述： | FULLY INTEGRATED POWER SUPPLY FIPS |
| 中文描述： | 完全集成的電源符合FIPS |
| 文件頁數(shù)： | 13/19頁 |
| 文件大?。?/td> | 236K |
| 代理商： | L6590N |
13/19
L6590A
Figure 27. PWM Control internal schematic
Oscillator and PWM Control
PWM regulation is accomplished by implementing voltage mode control. As shown in fig. 27, this block includes
an oscillator, a PWM comparator, a PWM latch and a PWM control input.
The oscillator operates at a frequency internally fixed at 65 kHz with a precision of ± 10%. This value has been
selectedso that thesecondharmonicfallsbelow150kHz, beyond whichsomeinternationalstandardsenvisage
more severe limits. The maximum duty cycle is limited at 70% typ.
The PWM latch (reset dominant) is set by the clock pulses of the oscillator and is reset by either the PWMcom-
parator or the Overcurrent comparator. The inverting input of the PWM comparator is externally available (pin
4, COMP) in order for an optocoupler-based circuit to close the controlloop that regulatesthe converter's output
voltage.
In case of overcurrent the voltage at pin COMP saturates high and the conduction of the power MOSFET is
stopped by the OCP comparator instead of the PWM comparator.
Under zero load conditionstheCOMPpinisclose toitslowsaturationand thegatedrivedelivers asshortpulses
as it can, limited by internal delays. They are however too long to maintain the long-term energy balance, thus
from time to time some cycles need being skipped and the operation becomes asynchronous. This is automat-
ically done by the control loop.
Standby Function
The standby function, optimized for flyback topology, automatically detects a light load condition for the convert-
er and decreases the oscillator frequency. The normal oscillation frequency is automatically resumed when the
output load builds up and exceeds a defined threshold.
This function allows to minimize power losses related to switching frequency, which represent the majority of losses
in a lightly loaded flyback, without giving up the advantages of a higher switching frequency at heavy load.
The Standbyfunction is realized by monitoring the peak current in the power switch. If the load is lowthat itdoes
not reach a threshold (80 mA typ.), the oscillator frequency will be set at 22 kHz typ.
When the load demands more power and the peak primary current exceeds a second threshold (190 mA typ.)
the oscillator frequency is reset at 65 kHz. This 110 mA hysteresis prevents undesired frequency change when
power is such that the peak current is close to either threshold.
The signal coming from the sense circuit is digitally filtered to avoid false triggering of this function as a result of
large load changes or noise.
L6590A
Clock
+
PWM
-
from OCP
comparator
COMP
S
R
Q
Max. Duty cycle
OSCILLATOR
to gate
driver
1 mA
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| L6591TR | 功能描述:開關(guān)變換器、穩(wěn)壓器與控制器 PWM CONTROLLER ZVS HALF-BRIDGE RoHS:否 制造商:Texas Instruments 輸出電壓:1.2 V to 10 V 輸出電流:300 mA 輸出功率: 輸入電壓:3 V to 17 V 開關(guān)頻率:1 MHz 工作溫度范圍: 安裝風格:SMD/SMT 封裝 / 箱體:WSON-8 封裝:Reel |
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| L6598_04 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:HIGH VOLTAGE RESONANT CONTROLLER |
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