- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374356 > KM48C8104B (SAMSUNG SEMICONDUCTOR CO. LTD.) 8M x 8bit CMOS Dynamic RAM with Extended Data Out(8M x 8位CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) PDF資料下載
參數(shù)資料
| 型號： | KM48C8104B |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 8M x 8bit CMOS Dynamic RAM with Extended Data Out(8M x 8位CMOS 動態(tài)RAM(帶擴展數(shù)據(jù)輸出)) |
| 中文描述： | 8米× 8位的擴展數(shù)據(jù)輸出的CMOS動態(tài)RAM（8米× 8位的CMOS動態(tài)隨機存儲器（帶擴展數(shù)據(jù)輸出）） |
| 文件頁數(shù)： | 1/21頁 |
| 文件大?。?/td> | 366K |
| 代理商： | KM48C8104B |
KM48C8004B,
KM48C8104B
CMOS DRAM
This is a family of 8,388,608 x 8 bit Extended Data Out Mode CMOS DRAMs. Extended Data Out Mode offers high speed random
access of memory cells within the same row. Refresh cycle(4K Ref. or 8K Ref.), access time (-45, -5 or -6), package type (SOJ or TSOP-
II) are optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities.
This 8Mx8 EDO Mode DRAM family is fabricated using Samsung
′
s advanced CMOS process to realize high band-width, low power con-
sumption and high reliability.
Part Identification
- KM48C8004B(5.0V, 8K Ref.)
- KM48C8104B(5.0V, 4K Ref.)
Extended Data Out Mode operation
CAS-before-RAS refresh capability
RAS-only and Hidden refresh capability
Fast parallel test mode capability
TTL(5.0V) compatible inputs and outputs
Early Write or output enable controlled write
JEDEC Standard pinout
Available in Plastic SOJ and TSOP(II) packages
+5.0V
±
10% power supply
Control
Clocks
RAS
CAS
W
Vcc
Vss
A0~A12
(A0~A11)*1
A0~A9
(A0~A10)*1
Memory Array
8,388,608 x 8
Cells
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to
change products and specifications without notice.
8M x 8bit CMOS Dynamic RAM with Extended Data Out
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Note) *1 : 4K Refresh
Refresh Cycles
Part
NO.
Refresh
cycle
Refresh time
Normal
64ms
KM48C8004B*
KM48C8104B
8K
4K
Unit : mW
S
DQ0
to
DQ7
Data out
Buffer
Data in
Buffer
Performance Range
Speed
-45
-5
-6
t
RAC
45ns
50ns
60ns
t
CAC
12ns
13ns
15ns
t
RC
74ns
84ns
104ns
t
HPC
17ns
20ns
25ns
Active Power Dissipation
Speed
-45
-5
-6
8K
550
495
440
4K
715
660
605
*
Access mode & RAS only refresh mode
: 8K cycle/64ms
CAS-before-RAS & Hidden refresh mode
: 4K cycle/64ms
Row Decoder
Column Decoder
VBB Generator
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
OE
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KM48S16030A | 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL |
| KM48S16030B | 128Mbit SDRAM 4M x 8Bit x 4 Banks Synchronous DRAM LVTTL |
| KM48S16030 | 4M x 8Bit x 4 Banks Synchronous DRAM |
| KM48S32230A | 8M x 8Bit x 4 Banks Synchronous DRAM(8M x 8位 x 4組同步動態(tài)RAM) |
| KM48S8030B | 2M x 8Bit x 4 Banks Synchronous DRAM(2M x 8位 x 4組同步動態(tài)RAM) |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KM-48F 50UA DC | 制造商:Fujita Electric 功能描述: |
| KM-48F 0-50MV DC | 制造商:Fujita Electric 功能描述: |
| KM-48F 100-0-100UA DC | 制造商:Fujita Electric 功能描述: |
| KM-48F 100MA DC | 制造商:Fujita Electric 功能描述: |
| KM-48F 100UA DC | 制造商:Fujita Electric 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。