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參數(shù)資料
| 型號(hào)： | IN74LV373N |
| 廠商： | INTEGRAL JOINT STOCK COMPANY |
| 英文描述： | OCTAL D-TYPE TRANSPARENT LATCH (3-STATE) |
| 中文描述： | 八路D型透明鎖存器（3態(tài)） |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 140K |
| 代理商： | IN74LV373N |
IN74LV373
1
O
CTAL
D-T
YPE
T
RANSPARENT
L
ATCH
(3-S
TATE
)
IN74LV373 are compatible by pinning with IN74HC373A and
IN74HCT373A series. Input voltage levels are compatible with
standard CMOS levels.
Output voltage levels are compatible with input levels of CMOS,
NMOS and TTL IC
S
Voltage supply range: 2.0 to 3.2 V
LOW input current: 1.0
μ
А
; 0.1
μ
А
at
Т
= 25
°
С
Input current LOW/HIGH: 8 m
А
Latch current: not less than 150 m
А
at
Т
= 125
°
С
ESD acceptable value: not less than 2000 V as per HBM and not
less than 200 V as per MM
ORDERING INFORMATION
IN74LV373N Plastic DIP
IN74LV373D SOIC
T
A
= -40
°
to 125
°
C
for all packages
PIN ASSIGNMENT
373
OE
01
Q
0
02
D
0
03
D
1
04
Q
1
05
Q
2
06
D
2
07
D
3
08
Q
3
09
GND
10
20
19
18
17
16
15
14
13
12
11
D
7
D
6
Q
6
Q
5
D
5
D
4
Q
4
LE
V
CC
Q
7
FUNCTION TABLE
Inputs
LE
H
H
L
X
Output
Qn
H
L
no change
Z
OE
L
L
L
H
Dn
H
L
X
X
BLOCK DIAGRAM
OE
01
Q
0
02
D
0
03
D
1
04
Q
1
05
Q
2
06
D
2
07
D
3
08
Q
3
09
19
18
17
16
15
14
13
12
11
D
7
D
6
Q
6
Q
5
D
5
D
4
Q
4
LE
Q
7
Pin 20=V
CC
Pin 10 = GND
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