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參數(shù)資料
| 型號： | IMSC011-W20S |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | Link adaptor |
| 中文描述： | 鏈路適配器 |
| 文件頁數(shù)： | 18/30頁 |
| 文件大小： | 239K |
| 代理商： | IMSC011-W20S |
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IMS C011
/ 30
18
&
Interrupt
Enable
Output
Ready
OutputInt
7
6
5
4
3
2
1
0
Figure 6.4
IMS C011 Mode 2 output status register
6.6
OutputInt
The
OutputInt
output is set high to indicate that the link is free to receive data from the microprocessor
for transmission as a data packet out of the serial link. It is inhibited from going high when the interrupt
enable bit in the output status register is low (section 6.4.4).
OutputInt
is reset low when data is written
to the data output register; it is set low by
Reset
(page 7).
6.7
Data read
Adatapacketreceivedontheinput linksetsthedata presentflagintheinput statusregister.If theinterrupt
enablebit inthestatusregisterisset,the
InputInt
output pinwillbesethigh.The microprocessorwilleither
respond to the interrupt (if the interrupt enablebit is set) or will periodically read the input status register
until the data present bit is high.
Whendataisavailablefromthelink, themicroprocessorreadsthedata packetfromthedatainputregister.
This will reset the data presentflag and cause the link adaptor to transmit an acknowledge packet out of
the serial link output.
InputInt
is automatically reset by reading the data input register; it is notnecessary
to read or write the input status register.
6.8
Data write
When the data output bufferis empty and a linkacknowledge has been received theoutput readyflag in
the output status register is set high. If the interrupt enable bit in the status register is set, the
OutputInt
output pin will also be set high. The microprocessorwill either respond to the interrupt (if theinterrupt en-
able bit is set) or will periodically read the output status register until the output ready bit is high.
When the output ready flag is high, the microprocessor can write data to the data output buffer. This will
result in the link adaptor resetting theoutput readyflag and commencing transmission of the data packet
out of the serial link. The output readystatus bit will remain low until the data byte transmissionhas been
completed andanacknowledgepacketisreceivedbytheinputlink.Thiswillsettheoutputreadyflag high;
if the interrupt enable bit is set,
OutputInt
will also be set high.
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