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參數(shù)資料
| 型號(hào)： | IFRIFT3000 |
| 廠商： | Qualcomm Incorporated |
| 元件分類： | 基帶處理器 |
| 英文描述： | The QUALCOMM IFR3000⑩ and IFT3000⑩ Rx and Tx IF/Baseband processors |
| 中文描述： | 高通IFR3000⑩⑩和IFT3000 Rx和Tx和IF /基帶處理器 |
| 文件頁(yè)數(shù)： | 2/4頁(yè) |
| 文件大?。?/td> | 188K |
| 代理商： | IFRIFT3000 |
Q U A L C O M M C D M A T E C H N O L O G I E S
HTTP://WWW.CDMATECH.COM
2
IFR3000
/IFT3000
Rx IF/BASEBAND PROCESSORS
E N A B L I N G T H E F U T U R E O F C O M M U N I C A T I O N S
T M
IFR3000
The circuit blocks within the IFR3000 include
the Rx AGC amplifier with 90 dB dynamic range,
IF mixer and CDMA/FM lowpass filters for
down-converting IF to analog baseband, and
analog-to-digital converters (ADC) for converting
to digital baseband. The IFR3000 includes clock
generators that drive the telephone’s digital processor and a
voltage-controlled oscillator (VCO) which generates the Rx mixer
local oscillator (LO) signal.
IFR3000 Device Features
Supports IS-98 (CDMA) and IS-19 (AMPS) standards for
dual-mode operation
2.7 to 3.15 V supply voltage
Low current: 26 / 21 mA in CDMA Rx / FM Rx Modes
Rx power control through 90 dB dynamic range AGC amplifier
IF mixer for downconverting IF to analog baseband
Low-pass filtering for CDMA and FM I- and Q-component
baseband signal demodulation
4-bit ADCs convert CDMA I and Q analog baseband components
to digital baseband
8-bit ADCs convert FM I and Q analog baseband to digital baseband
Clock generators for CDMA / AMPS operation
VCO for generation of Rx LO mixing signal
I- and Q-channel DC offset control inputs drive baseband DC
voltage offset to zero in CDMA and FM signal paths
Operational Mode compatibility with the MSM2300, MSM3000
and MSM3100 devices
Enhanced features with MSM3000 device through three-line serial
bus interface (SBI):
– Slotted FM Mode
– Selective power-down
– Mode selection
48-lead LQFP and 48-pin BCC packaging options for dense
circuit assemblies
SWITCH
Q_OFFSET I_OFFSET
TCXO
RXVCO_T1 RXVCO_T2
TCXO/N
RXQD[3:0]
CHIPx8
RXID[3:2]
FM_RX_QDATA_RXID1
FM_RX_IDATA_RXID0
RXVCO_OUT
RX VCO
Q I
DIV 2
FM
LPF
FM
LPF
CDMA
LPF
CDMA
LPF
CDMA
ADC
CDMA
ADC
FM
ADC
FM
ADC
FM_RX_CLK
FM_RX_STB
4
CHIPx8
DIV N
CDMA_IF
CDMA_IF/
FM_IF
FM_IF/
VCONTROL
* SBDT_FM/
* SBST_IDLE/
* SBCK_SLEEP/
Serial Bus Interface
and
Mode Control Logic
SBI_EN
2
* Dual-function pins
AGC
AGC
IFR3000 Functional Block Diagram
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