
3
IFT3000
The circuit blocks within the IFT3000 device
include digital-to-analog converters (DACs) for
converting digital baseband to analog baseband,
lowpass filters, a mixer for upconverting to IF and
an 85 dB dynamic range Tx AGC amplifier. The
IFT3000 device includes a fully programmable
phase-locked loop (PLL) for generating Tx LO and IF frequencies. The
IFT3000 device also has an 8-bit general-purpose ADC with three
selectable inputs for monitoring battery level, RF signal strength and
phone temperature.
IFT3000 Device Features
Supports IS-98 (CDMA) and IS-19 (AMPS) standards for dual-mode
operation
Operates on 2.7 to 3.15 V supply voltage
8-bit DACs convert digital baseband signals to analog baseband
CDMA and FM signal paths include lowpass filters for I and Q
output waveform smoothing
IF mixer upconverts analog baseband to IF
Tx power control through 85 dB dynamic range AGC amplifier
Programmable Tx PLL for generating Tx IF frequency
VCO for generation of Tx LO mixing signal
8-bit general-purpose ADC with 3-input analog multiplexer and
selectable input ranges
Operational Mode compatibility with the MSM2300 and MSM3000
devices
Enhanced features with MSM3000 device through three-line serial
bus interface (SBI):
– Tx PLL phase-detector polarity
– Tx PLL programmability
– Punctured CDMA transmission
– Selective power-down
– Mode selection
48-lead LQFP and 48-pin BCC packaging options for dense circuit
assemblies
TXVCO_T1
TXVCO_T2
FM_MOD
TXIF_OUT
TXIF_OUT/
VCONTROL
* SBDT_FM/
* SBST_IDLE/
* SBCK_SEL2
SBI_EN
PD_OUT
PD_ISET
TXD[7:0]
TX_CLK
TX_CLK/
I Q
DIV 2
TX
VCO
FM
LPF
LPF
LPF
8-BIT
DAC
PLL
LOCK_DET
ADC_ENABLE
S
ADC_DATA
ADC_CLK
ADC_IN3
GP
ADC
8-BIT
DAC
TCXO
2
8
Serial Bus Interface
and
Control Logic
SEL1_PA_ON
Analog
Multiplexer
ADC_IN1
RBIAS
* Dual-function pins
AGC
ADC_IN2
IFT3000 Functional Block Diagram