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126
2593O–AVR–02/12
ATmega644
Table 14-3 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the fast
PWM mode.
Note:
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set. In
this case the compare match is ignored, but the set or clear is done at TOP.
See SectionTable 14-4 shows the COMnx1:0 bit functionality when the WGMn3:0 bits are set to the phase
correct or the phase and frequency correct, PWM mode.
Note:
1. A special case occurs when OCRnA/OCRnB equals TOP and COMnA1/COMnB1 is set.
See Bit 1:0 – WGMn1:0: Waveform Generation Mode
Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting
sequence of the counter, the source for maximum (TOP) counter value, and what type of wave-
form generation to be used, see
Table 14-5. Modes of operation supported by the Timer/Counter
unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types
Table 14-3.
Compare Output Mode, Fast
PWMCOMnA1/COMnB1
COMnA0/COMnB0
Description
0
Normal port operation, OCnA/OCnB disconnected.
01
WGMn3:0 = 14 or 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
10
Clear OCnA/OCnB on Compare Match, set
OCnA/OCnB at BOTTOM (non-inverting mode)
11
Set OCnA/OCnB on Compare Match, clear
OCnA/OCnB at BOTTOM (inverting mode)
Table 14-4.
Compare Output Mode, Phase Correct and Phase and Frequency Correct
COMnA1/COMnB1
COMnA0/COMnB0
Description
0
Normal port operation, OCnA/OCnB disconnected.
01
WGMn3:0 = 9 or 11: Toggle OCnA on Compare
Match, OCnB disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
10
Clear OCnA/OCnB on Compare Match when up-
counting. Set OCnA/OCnB on Compare Match when
downcounting.
11
Set OCnA/OCnB on Compare Match when up-
counting. Clear OCnA/OCnB on Compare Match
when downcounting.