參數(shù)資料
型號: IDT49FCT805CTSOB
廠商: Integrated Device Technology, Inc.
英文描述: FAST CMOS BUFFER/CLOCK DRIVER
中文描述: 快速CMOS緩沖器/時鐘驅(qū)動器
文件頁數(shù): 5/7頁
文件大?。?/td> 126K
代理商: IDT49FCT805CTSOB
IDT49FCT805/806/A
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
9.1
5
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
(3,4)
2574 tbl 07
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. t
PLH
, t
PHL
, t
SK
(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to V
CC
, operating temperature and process parameters. These propagation delay
limits do not imply skew.
IDT49FCT805/806
Com'l.
IDT49FCT805A/806A
Com'l.
Mil.
Mil.
Symbol
t
PLH
t
PHL
t
R
t
F
t
SK
(o)
Parameter
Condition
(1)
C
L
= 50pF
R
L
= 500
Min
.(2)
1.5
Max.
5.6
Min
.(2)
1.5
Max.
6.3
Min
.(2)
1.5
Max.
5.3
Min
.(2)
1.5
Max.
6.0
Unit
ns
Propagation Delay
IN
A
to OA
n
, IN
B
to OB
n
Output Rise Time
Output Fall Time
Output skew: skew between outputs of all
banks of same package (inputs tied together)
Pulse skew: skew between opposite
transitions of same output (|t
PHL
-t
PLH
|)
Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
1.5
1.5
0.7
1.5
1.5
0.9
1.5
1.5
0.7
1.5
1.5
0.9
ns
ns
ns
t
SK
(p)
1.0
1.1
1.0
1.1
ns
t
SK
(t)
1.5
1.5
1.5
1.5
ns
t
PZL
t
PZH
t
PLZ
t
PHZ
Output Enable Time
OE
A
to OA
n
,
OE
B
to OB
n
Output Disable Time
OE
A
to OA
n
,
OE
B
to OB
n
1.5
8.0
1.5
8.5
1.5
8.0
1.5
8.5
ns
1.5
7.0
1.5
7.5
1.5
7.0
1.5
7.5
ns
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