參數(shù)資料
型號: HYB18T256800AFL-3
廠商: INFINEON TECHNOLOGIES AG
英文描述: 256 Mbi t DDR2 SDRAM
中文描述: 256姆噸DDR2內(nèi)存
文件頁數(shù): 26/90頁
文件大?。?/td> 1711K
代理商: HYB18T256800AFL-3
Page 26 Rev. 1.02 May 2004
INFINEON Technologies
HYB18T256400/800/160AF
256Mb DDR2 SDRAM
ODT timing mode switch
When entering the Power Down Modes “Slow Exit” Active Power Down and Precharge Power Down two addi-
tional timing parameters (tANPD and tAXPD) define if synchronous or asynchronous ODT timings have to be
applied.
Mode entry:
As long as the timing parameter tANPDmin is satisfied when ODT is turned on or off before entering these power-
down modes, synchronous timing parameters can be applied. If tANPDmin is not satisfied, asynchronous timing
parameters apply
CKE
CK, CK
tANPD (3 tck)
T0
T1
T2
T-1
T-2
T-3
T-4
T-5
t
IS
ODT03
ODT turn-off, tANPD >= 3 tck :
ODT turn-off, tANPD <3 tck :
tAOFD
RTT
ODT
t
IS
RTT
t
IS
ODT
tAOND
RTT
tAONPDmax
ODT
ODT turn-on, tANPD >= 3 tck :
Synchronous
timings apply
Synchronous
timings apply
Asynchronous
timings apply
tAOFPDmax
ODT
RTT
Asynchronous
timings apply
ODT turn-on, tANPD < 3 tck :
t
IS
相關(guān)PDF資料
PDF描述
HYB18T256400AFL-37 256 Mbi t DDR2 SDRAM
HYB18T256800AFL-37 256 Mbi t DDR2 SDRAM
HYB18T256400AFL-3S 256 Mbi t DDR2 SDRAM
HYB18T256800AFL-3S 256 Mbi t DDR2 SDRAM
HYB18T256400AFL-5 256 Mbi t DDR2 SDRAM
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