參數(shù)資料
型號(hào): HY5DU663222Q-7M
英文描述: DDR Synchronous DRAM
中文描述: DDR同步DRAM
文件頁數(shù): 22/37頁
文件大小: 336K
代理商: HY5DU663222Q-7M
Rev. 0.3 / Dec. 01
22
HY5DU12422T
HY5DU12822T
HY5DU121622T
EXTENDED MODE REGISTER SET (EMRS)
The Extended Mode Register controls functions beyond those controlled by the Mode Register; these additional func-
tions include DLL enable/disable, output driver strength selection(optional). These functions are controlled via the bits
shown below. The Extended Mode Register is programmed via the Mode Register Set command ( BA0=1 and BA1=0)
and will retain the stored information until it is programmed again or the device loses power.
The Extended Mode Register must be loaded when all banks are idle and no bursts are in progress, and the controller
must wait the specified time before initiating any subsequent operation. Violating either of these requirements will
result in unspecified operation.
BA1
BA0
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
0
1
RFU*
0**
DS
DLL
A0
DLL enable
0
Enable
1
Diable
BA0
MRS Type
0
MRS
1
EMRS
A1
Output Driver
Impedance Control
0
Full Strength Driver
1
Half
Strength Driver
* All bits in RFU address fields must be programmed to Zero, all other states are reserved for future usage
** This part do not support /QFC function, A2 must be programmed to Zero.
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