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參數(shù)資料
| 型號(hào)： | HW3100 |
| 廠商： | Lineage Power |
| 英文描述： | Home Phoneline Networking Chip Set(主電話線網(wǎng)絡(luò)物理層) |
| 中文描述： | 家庭電話線網(wǎng)絡(luò)芯片組（主電話線網(wǎng)絡(luò)物理層） |
| 文件頁(yè)數(shù)： | 4/6頁(yè) |
| 文件大?。?/td> | 144K |
| 代理商： | HW3100 |
HW3100/HW2000 Home Wire
Home Phoneline Networking Chip Set
Preliminary Product Brief
August 2000
4
Lucent Technologies Inc.
Functional Description
The HW3100/HW2000 Home Wirechip set consists of the Lucent HW3100 HomePNAmodem controller and the
HW2000 analog front end (AFE). The HW3100 integrates the following functional blocks: an IEEE802.3 media
access controller (MAC), a HomePNA1.1 PHY, a PCI interface, independent transmit and receive FIFOs, separate
Tx and Rx bus mastering DMA controllers, a serial EEPROM interface, and a line serial I/O (LSIO) interface for
V.90/V.92 host-controlled modem applications. The HW2000 provides the line interface, on-chip Tx and Rx filtering,
an analog-to-digital converter (ADC), and a digital-to-analog converter (DAC).
5-8804.f
Figure 2. Home Wire Chip Set PCI with V.90/V.92 Host-Controlled Modem System Block Diagram
Figure 2 is a block diagram of a PCI-based Home Wire solution that provides HomePNA 2.0 functionality and a
V.90/V.92 host-controlled modem.
Interactions between the host system and the Home Wire chip set occur in two modes: programmed I/O (PIO) and
bus master modes. In the PIO mode, the host can read and write to the HW3130’s control and status registers
using either direct or memory mapped I/O transactions. When operating as a bus master, the HW3130 performs
DMA transactions, automatically transferring packet data between its internal FIFOs and the host memory using
efficient burst transactions.
HomePNA
MAGNETICS
RJ11
LEDs
SERIAL
EEPROM
DAA
LINE
CODEC
OPTIONAL V.90/V.92
HOST-CONTROLLED MODEM AFE
LUCENT TECHNOLOGIES
Home Wire
HW3100
HomePNAMODEM
CONTROLLER
LSIO
PCI
HW2000 AFE I/O
HomePNA 1.1 AFE
LEDs
SERIAL EEPROM
LUCENT
TECHNOLOGIES
Home Wire
HW2000
AFE
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