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參數資料
| 型號： | HV6810P |
| 廠商： | SUPERTEX INC |
| 元件分類： | 顯示驅動器 |
| 英文描述： | 10-Channel Serial-Input Latched Display Driver |
| 中文描述： | VACUUM FLUOR DISPLAY DRIVER, PDIP18 |
| 封裝： | PLASTIC, DIP-18 |
| 文件頁數： | 4/5頁 |
| 文件大?。?/td> | 33K |
| 代理商： | HV6810P |
12-145
w(CKH)
t
50%
50%
V
IH
V
IL
V
IH
V
IL
Valid
50%
50%
Data
Clock
h(D)
t
su(D)
t
50%
V
IH
V
IL
V
IH
V
IL
50%
50%
CKH–LEH
t
Valid
Valid
90%
Clock
Input
Latch
Enable
Output
pd
t
w(LEH)
t
HV6810
Serial
Data
Input
Shift Register Contents
Serial
Data
Output
Latch Contents
Output Contents
Clock
Input
Strobe
Input
Blanking
Input
I
1
I
2
I
3
… I
N-1
H R
1
R
2
… R
N-2
R
N-1
L R
1
R
2
… R
N-2
R
N-1
R
1
R
2
R
3
… R
N-1
R
N
X X X … X
I
N
I
1
I
2
I
3
… I
N-1
I
N
I
1
I
2
I
3
… I
N-1
I
N
H
R
N-1
R
N-1
R
N
X
L
X
X
L
R
1
R
2
R
3
… R
N-1
R
N
P
1
P
2
P
3
… P
N-1
P
N
X X X … X
P
1
P
2
P
3
… P
N-1
P
N
P
N
P
1
P
2
P
3
… P
N-1
L L L … L
P
N
L
X
H
L
H
L = Low logic level
H = High logic level
X = Irrelevant
P = Present state
R = Previous state
Function Table
Functional Block Diagram
Input Timing
Output Switching Times
Switching Waveforms
Blanking
Latch Enable
Q1
Q9
Q2
Q10
1D
C1
C2
2D
1D
C1
1D
C1
1D
C1
C2
2D
C2
2D
C2
2D
Data Input
Clock
R1
R2
R9
R10
LC1
LC2
LC9
LC10
Latches
Shift Register
6 Stages
(Q3 thru Q8)
not shown
Serial
Out
Logic Diagram (positive logic)
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相關代理商/技術參數 |
參數描述 |
|---|---|
| HV6810PG | 制造商:Supertex Inc 功能描述:VFD DRVR 5.5V/80V 18-Pin PDIP |
| HV6810P-G | 制造商:Supertex Inc 功能描述: |
| HV6810PJ | 功能描述:顯示驅動器和控制器 HVCMOS 10Chl Latched RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| HV6810PJ-G | 功能描述:顯示驅動器和控制器 HVCMOS 10Chl Latched RoHS:否 制造商:Panasonic Electronic Components 工作電源電壓:2.7 V to 5.5 V 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Reel |
| HV6810PJ-GM910 | 制造商:Supertex Inc 功能描述:VFD DRVR 5.5V/80V 20-Pin PLCC T/R |
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