參數(shù)資料
型號(hào): HT48R50A
廠商: Holtek Semiconductor Inc.
元件分類: 數(shù)學(xué)處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8位微控制器
文件頁(yè)數(shù): 42/46頁(yè)
文件大?。?/td> 1037K
代理商: HT48R50A
SIZA [m]
Increment data memory and place result in ACC, skip if 0
Description
The contents of the specified data memory are incremented by 1. If the result
is 0, the next instruction is skipped and the result is stored in the accumula-
tor. The data memory remains unchanged. If the result is 0, the following in-
struction, fetched during the current instruction execution, is discarded and
a dummy cycle is replaced to get the proper instruction (2 cycles). Otherwise
proceed with the next instruction (1 cycle).
Operation
Skip if ([m]+1)=0, ACC
([m]+1)
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SNZ [m].i
Skip if bit "i" of the data memory is not 0
Description
If bit "i" of the specified data memory is not 0, the next instruction is skipped.
If bit "i" of the data memory is not 0, the following instruction, fetched during
the current instruction execution, is discarded and a dummy cycle is re-
placed to get the proper instruction (2 cycles). Otherwise proceed with the
next instruction (1 cycle).
Operation
Skip if [m].i 0
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SUB A,[m]
Subtract data memory from the accumulator
Description
The specified data memory is subtracted from the contents of the accumula-
tor, leaving the result in the accumulator.
Operation
ACC
ACC+[m]+1
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
SUBM A,[m]
Subtract data memory from the accumulator
Description
The specified data memory is subtracted from the contents of the accumula-
tor, leaving the result in the data memory.
Operation
[m]
ACC+[m]+1
Affected flag(s)
TC2
TC1
TO
PD
OV
Z
AC
C
HT48R50A-1
Rev. 1.10
42
July 2, 2001
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