- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371786 > HCTS157D (Intersil Corporation) Triple 3-Input Positive-AND Gates 20-LCCC -55 to 125 PDF資料下載
參數(shù)資料
| 型號： | HCTS157D |
| 廠商： | Intersil Corporation |
| 英文描述： | Triple 3-Input Positive-AND Gates 20-LCCC -55 to 125 |
| 中文描述： | 輻射加固四2輸入多路復用器 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大小： | 132K |
| 代理商： | HCTS157D |
550
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
|
Copyright
Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS157DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead SBDIP
HCTS157KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS157D/Sample
+25
o
C
Sample
16 Lead SBDIP
HCTS157K/Sample
+25
o
C
Sample
16 Lead Ceramic Flatpack
HCTS157HMSR
+25
o
C
Die
Die
HCTS157MS
Radiation Hardened
Quad 2-Input Multiplexers
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
S
1I0
1I1
1Y
2I0
2I1
GND
2Y
VCC
4I0
4I1
4Y
3I0
3I1
3Y
E
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
S
1I0
1I1
1Y
2I0
2I1
GND
2Y
VCC
4I0
4I1
4Y
3I0
3I1
3Y
E
Features
3 Micron Radiation Hardened CMOS SOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Standard Outputs 10 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS157MS is a Radiation Hardened quad
2-input multiplexers with select and enable inputs.
The HCTS157MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS157MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
August 1995
Spec Number
518610
File Number
2464.2
D
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS157K | Triple 3-Input Positive-AND Gates 14-CDIP -55 to 125 |
| HCTS157HMSR | Radiation Hardened Quad 2-Input Multiplexers |
| HCTS163KMSR | Radiation Hardened Synchronous Counter |
| HCTS163MS | Radiation Hardened Synchronous Counter |
| HCTS163D | Radiation Hardened Synchronous Counter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS157DMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Multiplexers |
| HCTS157HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Multiplexers |
| HCTS157K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Multiplexers |
| HCTS157KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Multiplexers |
| HCTS157MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Quad 2-Input Multiplexers |
發(fā)布緊急采購，3分鐘左右您將得到回復。