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參數(shù)資料
| 型號(hào)： | HCTS138DMSR |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 通用總線功能 |
| 英文描述： | Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| 中文描述： | HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDIP16 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大小： | 154K |
| 代理商： | HCTS138DMSR |
510
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright Intersil Corporation 1999
Ordering Information
PART NUMBER
TEMPERATURE RANGE
SCREENING LEVEL
PACKAGE
HCTS138DMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead SBDIP
HCTS138KMSR
-55
o
C to +125
o
C
Intersil Class S Equivalent
16 Lead Ceramic Flatpack
HCTS138D/Sample
+25
o
C
Sample
16 Lead SBDIP
HCTS138K/Sample
+25
o
C
Sample
16 Lead Ceramic Flatpack
HCTS138HMSR
+25
o
C
Die
Die
HCTS138MS
Radiation Hardened Inverting
3-to-8 Line Decoder/Demultiplexer
Pinouts
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
A0
A1
A2
E1
E2
E3
GND
Y7
VCC
Y1
Y2
Y3
Y4
Y5
Y6
Y0
A0
A1
A2
E1
E2
E3
Y7
GND
VCC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
2
3
4
5
6
7
8
1
16
15
14
13
12
11
10
9
Features
3 Micron Radiation Hardened SOS CMOS
Total Dose 200K RAD (Si)
SEP Effective LET No Upsets: >100 MEV-cm
2
/mg
Single Event Upset (SEU) Immunity < 2 x 10
-9
Errors/
Bit-Day (Typ)
Dose Rate Survivability: >1 x 10
12
RAD (Si)/s
Dose Rate Upset >10
10
RAD (Si)/s 20ns Pulse
Latch-Up Free Under Any Conditions
Fanout (Over Temperature Range)
- Bus Driver Outputs - 15 LSTTL Loads
Military Temperature Range: -55
o
C to +125
o
C
Significant Power Reduction Compared to LSTTL ICs
DC Operating Voltage Range: 4.5V to 5.5V
LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
Input Current Levels Ii
≤
5
μ
A at VOL, VOH
Description
The Intersil HCTS138MS is a Radiation Hardened 3-to-8 line
Decoder/Demultiplexer. The outputs are active in the low
state. Two active low and one active high enables (E1, E2,
E3) are provided. If the device is enabled, the binary inputs
(A0, A1, A2) determine which one of the eight normally high
outputs will go to a low logic level.
The HCTS138MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCTS138MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
August 1995
Spec Number
518605
File Number
2462.2
D
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HCTS138D | Hex Inverters 20-LCCC -55 to 125 |
| HCTS138K | Hex Inverters 14-CDIP -55 to 125 |
| HCTS138MS | Hex Inverters 14-CFP -55 to 125 |
| HCTS138HMSR | Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| HCTS139DMSR | Radiation Hardened Dual 2-to-4 Line Decoder/Demultiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HCTS138HMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| HCTS138K | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| HCTS138KMSR | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| HCTS138MS | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
| HCTS138MS_05 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Radiation Hardened Inverting 3-to-8 Line Decoder/Demultiplexer |
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