參數(shù)資料
型號(hào): GS9090ACNE3
廠商: Gennum Corporation
英文描述: GS9090A GenLINX-R III 270Mb/s Deserializer for SDI
中文描述: GS9090A GenLINX - R的第三270Mb / s的SDI解串器
文件頁(yè)數(shù): 46/69頁(yè)
文件大?。?/td> 687K
代理商: GS9090ACNE3
GS9090A Preliminary Data Sheet
Proprietary and Confidential
34714 - 0
February 2006
46 of 69
Figure 3-6: FIFO in Video Mode
When operating in video mode, the GS9090A will write data sequentially into the
FIFO, starting with the first active pixel in location zero of the memory. In this mode,
it is possible to use the FIFO for clock phase interchange and data alignment /
delay. The extracted H, V, and F information will also be written into the FIFO. The
H, V, and F outputs will be timed to the video data read from the FIFO by the
application interface (see
HVF Timing Signal Generation on page 26
).
The device will ensure write-side synchronization is maintained, according to the
extracted PCLK and flywheel timing information.
Full read-control of the FIFO is made available to the application interface such that
data will be clocked out of the FIFO on the rising edge of the externally provided
RD_CLK signal. When there is a HIGH-to-LOW transition at the RD_RESET pin
the first pixel presented to the video data bus will be the first 000 of the SAV (see
Figure 3-7
). The FIFO_LD pulse may be used to control the RD_RESET pin.
NOTE: The RD_RESET pulse should not be held LOW for more than one RD_CLK
cycle.
Figure 3-7: RD_RESET Pulse Timing
In video mode, the ANC_DETECT output signal will be timed to the data output
from the FIFO (see
Ancillary Data Detection and Indication on page 29
for more
detail).
WR_CLK (PCLK)
H
FIFO
(Video Mode)
RD_CLK
Application Interface
10-bit Video Data
10-bit Video Data
V
F
H
V
F
ANC
ANC
WR_RESET
RD_RESET
Internal
EDH_DETECT
EDH_DETECT
000
3FF
000
XYZ
Y'CbCr DATA
RD_CLK
RD_RESET
相關(guān)PDF資料
PDF描述
GS9090 GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI
GS9090-CNE3 GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI
GS9092A GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
GS9092ACNE3 GS9092A GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
GS9092 GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GS9090B 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI
GS9090B_10 制造商:GENNUM 制造商全稱:GENNUM 功能描述:GenLINX III 270Mb/s Deserializer for SDI
GS9090BCNE3 功能描述:RF, RFID, WIRELESS RoHS:是 類別:集成電路 (IC) >> 接口 - 串行器,解串行器 系列:* 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 功能:解串器 數(shù)據(jù)速率:2.5Gbps 輸入類型:串行 輸出類型:并聯(lián) 輸入數(shù):- 輸出數(shù):24 電源電壓:1.8 V ~ 3.3 V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:64-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-TQFP-EP(10x10) 包裝:管件
GS9090BCNTE3 制造商:Semtech Corporation 功能描述:270Mb/s Receiver for SDI & ASI
GS9090CNE3 制造商:Gennum Corporation 功能描述: