參數(shù)資料
型號: GS9090ACNE3
廠商: Gennum Corporation
英文描述: GS9090A GenLINX-R III 270Mb/s Deserializer for SDI
中文描述: GS9090A GenLINX - R的第三270Mb / s的SDI解串器
文件頁數(shù): 36/69頁
文件大小: 687K
代理商: GS9090ACNE3
GS9090A Preliminary Data Sheet
Proprietary and Confidential
34714 - 0
February 2006
36 of 69
3.9.6 Automatic Video Standard and Data Format Detection
The GS9090A can independently detect the input video standard and data format
by using the timing parameters extracted from the received TRS ID words. Total
samples per line, active samples per line, total lines per field/frame, and active lines
per field/frame are all calculated and presented to the host interface via the
RASTER_STRUCTURE registers (
Table 3-9
).
Also associated with the RASTER_STRUCTURE registers is the status bit,
STD_LOCK. The GS9090A will set STD_LOCK HIGH when the flywheel has
achieved full synchronization to the received video standard. STD_LOCK is stored
in the DATA_FORMAT register (
Table 3-7
).
The four RASTER_STRUCTURE registers, as well as the STD_LOCK status bit
will default to zero after a device reset. They will also default to zero if the device
loses lock to the input data stream (LOCKED = LOW), or if the SMPTE_BYPASS
pin is asserted LOW.
Table 3-8: Host Interface Description for SMPTE 352M Payload Identifier Registers
Register Name
Bit
Name
Description
R/W
Default
VIDEO_FORMAT_OUT_B
Address: 10h
15-8
SMPTE 352M Byte 4
Data will be available in this register when
Video Payload Identification Packets are
detected in the data stream.
R
0
7-0
SMPTE 352M Byte 3
Data will be available in this register when
Video Payload Identification Packets are
detected in the data stream.
R
0
VIDEO_FORMAT_OUT_A
Address: 0Fh
15-8
SMPTE 352M Byte 2
Data will be available in this register when
Video Payload Identification Packets are
detected in the data stream.
R
0
7-0
SMPTE 352M Byte 1
Data will be available in this register when
Video Payload Identification Packets are
detected in the data stream.
R
0
Table 3-9: Host Interface Description for Raster Structure Registers
Register Name
Bit
Name
Description
R/W
Default
RASTER_STRUCTURE1
Address: 11h
15-11
Not Used
10-0
RASTER_STRUCTURE1[10:0]
Total Lines Per Frame
R
0
RASTER_STRUCTURE2
Address: 12h
15-13
Not Used
12-0
RASTER_STRUCTURE2[12:0]
Total Words Per Line
R
0
RASTER_STRUCTURE3
Address: 13h
15-13
Not Used
12-0
RASTER_STRUCTURE3[12:0]
Words Per Active Line
R
0
RASTER_STRUCTURE4
Address: 14h
15-11
Not Used
10-0
RASTER_STRUCTURE4[10:0]
Active Lines Per Field
R
0
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