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參數(shù)資料
| 型號(hào)： | GS9090 |
| 廠商： | Gennum Corporation |
| 英文描述： | GS9090 GenLINX-R III 270Mb/s Deserializer for SDI and DVB-ASI |
| 中文描述： | GS9090 GenLINX - R的第三270Mb / s的SDI和DVB解串器，意大利航天局 |
| 文件頁數(shù)： | 40/70頁 |
| 文件大?。?/td> | 696K |
| 代理商： | GS9090 |
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GS9090 Data Sheet
28201 - 1
July 2005
40 of 70
3.9.7.1 Video Standard Error Detection
If a mismatch between the received SMPTE 352M packets and the calculated
video standard occurs, the GS9090 will indicate a video standard error by setting
the VD_STD_ERR bit of the ERROR_STATUS register HIGH. The device will
detect errors in both version 1 and version 0 352M packets.
3.9.7.2 EDH CRC Error Detection
The GS9090 calculates the Full Field (FF) and Active Picture (AP) CRC words
according to SMPTE RP165 in support of Error Detection and Handling packets in
SD signals.
These calculated CRC values are compared with the received CRC values. If a
mismatch is detected, the error is flagged in the AP_CRC_ERR and/or
FF_CRC_ERR bits of the ERROR_STATUS register. These two flags are shared
between fields 1 and 2.
The AP_CRC_ERR bit will be set HIGH when an active picture CRC mismatch has
been detected in field 1 or 2. The FF_CRC_ERR bit will be set HIGH when a full
field CRC mismatch has been detected in field 1 or 2.
EDH CRC errors will only be indicated when the device has correctly received EDH
packets.
SMPTE RP165 specifies the calculation ranges and scope of EDH data for
standard 525 and 625 component digital interfaces. The GS9090 will utilize these
standard ranges by default.
Table 3-12: Host Interface Description for Error Mask Register
Register Name
Bit
Name
Description
R/W
Default
ERROR_MASK
Address: 25h
15-7
–
Not Used
–
–
6
5
VD_STD_ERR_MASK
Video Standard Error Flag Mask bit.
R/W
0
FF_CRC_ERR_MASK
Full Field CRC Error Flag Mask bit.
R/W
0
4
AP_CRC_ERR_MASK
Active Picture CRC Error Flag Mask bit
R/W
0
3
LOCK_ERR_MASK
Lock Error Flag Mask bit.
R/W
0
2
CS_ERR_MASK
Checksum Error Flag Mask bit.
R/W
0
1
SAV_ERR_MASK
Start of Active Video Error Flag Mask bit.
R/W
0
0
EAV_ERR_MASK
End of Active Video Error Flag Mask bit.
R/W
0
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